IBM: PowerPC G5 to Go Mobile

 
 
By Mark Hachman  |  Posted 2004-06-25 Email Print this article Print
 
 
 
 
 
 
 

Is the PowerPC G5 notebook at hand? An IBM chip designer details power-saving PowerTune technology that will let the processor work in mobile and server platforms.

The 64-bit PowerPC G5 processor will undoubtedly be a fixture of Apple CEO Steve Jobs keynote next weeks Worldwide Developers Conference. After all, its the basis of the companys workstation and server lines. But Mac professionals, and even Linux programmers, will be waiting for word of a mobile version. According to officials of IBM Corp., the technology for a notebook version of the PowerPC G5, a k a the PowerPC 970 series of processors, may be at hand. IBMs PowerPC 970 family of microprocessors has quietly become a rarity in the computing world: a one-size-fits-all architecture used for notebooks, desktops and even low-end servers. The chip is based on the companys longstanding POWER architecture, a dual-core processor used in some of IBMs server lines.
Now, IBM is being asked to migrate those chips into the crucial notebook market while simultaneously designing an architecture that can be competitive in low-end servers.
Norman Rohrer, chief designer of the PowerPC 970FX chip used in Apples Power Mac G5 desktops and Xserve servers, said the same chip that IBM uses for its desktop machines can also be used comfortably within future PowerBook notebooks through a power-management technique called "PowerTune." Industry insiders said a PPC 970FX-based notebook is not expected to ship before the end of the year, however. At the same time, a small-form-factor iMac would require a similar thermally managed processor. Reports recently circulated that Apple will introduce a G5-based iMac at WWDC in San Francisco. In addition, Merrill Lynch & Co. Inc. vice president and analyst Steven Milunovich on Wednesday published a note to clients predicting that a redesigned iMac would debut next week at the WWDC.
One retailer interviewed by eWEEK.com said supplies of the G4-based iMac have slowed, consistent with Apples strategy just before a refresh of the product line. But the retailer could not confirm that a G5 iMac would be announced next week. However, other industry watchers said that same trend would occur for any refresh of the line, whether with the G5 or a faster PowerPC G4 processor. An Apple representative declined to comment. For insights on the Mac in the enterprise, check out eWEEK.com Executive Editor Matthew Rothenbergs Weblog. IBMs design goal with PowerTune is to balance performance and power consumption. In addition, because the "leakage current"–the amount of power that trickles away and is wasted–is significantly higher at finer process technologies, such as used for the 970FX, IBM developed PowerTune. The design approach somewhat differs from rival Intel Corp., which places as much emphasis on manufacturing as it does on design, if not more. While Intel has aggressively pushed new process technologies into the market, IBM has concentrated upon process improvements, such as silicon-on-insulator and doped silicon. Using materials with a low threshold voltage can improve the clock speed of a chip, but also increases the power lost to leakage current, IBMs Rohrer said. "If you optimize the process you can not leak as much in the portable space," Rohrer said. The 970FXs design is more efficient than the older PowerPC 750FX, part of the G4 family of processors. It contained two PLL (phase-locked-loops) circuits, designed to shift the processor quickly into a low-power state in just three clock cycles. Instead, the G5 PowerTune design is based on a single PLL that can shift the processor into several low-power states in a single clock cycle. The PLL will be locked to a single frequency, simplifying the synchronization of circuitry, Rohrer said. Instead, a multiplexer will divide the bus speed, thus slowing the chip. This scheme is the opposite of desktop processors, where the processor often runs at some greater multiple of a given bus speed. The frequency switch will not be limited to the processor core but also manage the processor bus, the I/O bridge and the memory controller. For example, PowerTune-savvy chip can be asked to drop down to a half or a quarter the rated frequency, or even down into a "deep nap" state where the chip can run at 1/64 of the rated frequency, Rohrer said. Within each frequency iteration, the processor also can be instructed to run in idle or nap modes, which will reduce the operating voltage of the chip. The combination of voltage and frequency scaling, Rohrer said, will be PowerTunes advantage, and is a much more flexible power-management scheme than its x86-compatible competitors. Moreover, power modes can be entered and left relatively quickly, "on the order of several microseconds," Rohrer said. "Anytime you pause on the keyboard, after the time the system has to finish the last instruction, the system can enter deep nap." Next Page: Bridging Notebooks and Servers with One Architecture.



 
 
 
 
 
 
 
 
 
 
 

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