Suns Jaguar Powers Transactions

By Peter Coffee  |  Posted 2003-12-15 Print this article Print

Sun's rack unit sports new 1,200MHz chips from TI.

Glimpsed on a test bench at Sun Microsystems San Diego development lab, this rack units label suggests imminent release of the "Jaguar" UltraSPARC IV processors that the company has promised for shipment in the first half of next year. The 1,200MHz label confirms previous speculation that the new chip, built by Texas Instruments on a 130-nanometer process, would debut at that clock rate.

Sun personnel at the lab promised that the new processor units would mix and match with units containing older CPUs, enabling incremental upgrades with full software compatibility in existing server installations.

Each UltraSPARC IV combines two UltraSPARC III cores with on-chip tag storage for 8MB of off-chip, two-way, set-associative Level 2 cache per core. Sun officials project that the new chips thread-friendly design, based on technology acquired last year from Afara Websystems, will enable tens of concurrent threads, each with access to the full cache bandwidth—initially doubling, and eventually redoubling, the throughput of UltraSPARC III. Each chips onboard memory controller supports 16GB of memory, allowing as much as 64GB on the four-processor unit, with processors sharing memory via their built-in controllers for Suns Fireplane interconnection fabric.

TI and Sun project a move to 90-nanometer technology by 2006, with a shrink to 45 nanometers perhaps as early as 2008.

Peter Coffee is Director of Platform Research at, where he serves as a liaison with the developer community to define the opportunity and clarify developers' technical requirements on the company's evolving Apex Platform. Peter previously spent 18 years with eWEEK (formerly PC Week), the national news magazine of enterprise technology practice, where he reviewed software development tools and methods and wrote regular columns on emerging technologies and professional community issues.Before he began writing full-time in 1989, Peter spent eleven years in technical and management positions at Exxon and The Aerospace Corporation, including management of the latter company's first desktop computing planning team and applied research in applications of artificial intelligence techniques. He holds an engineering degree from MIT and an MBA from Pepperdine University, he has held teaching appointments in computer science, business analytics and information systems management at Pepperdine, UCLA, and Chapman College.

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