Micron Introduces 2 New High-Performance Flash Chips

By Chris Preimesberger  |  Posted 2009-10-19 Print this article Print

Micron is manufacturing a multilevel cell enterprise NAND chip for added storage capacity and a single-level cell device for added performance. The company is sampling both new enterprise NAND devices with systems makers and controller manufacturers and is expected to be in full production by 2010.

Micron Technology, which was forced to close down its NAND flash memory production facility in Boise, Idaho, in 2008 in a cost-cutting measure, is keeping its two remaining fabrication facilities-co-owned with Intel-busy in Lehi, Utah, and Manassas, Va.

The company announced Oct. 19 that it is now manufacturing two new NAND flash devices. The first is an MLC (multilevel cell) enterprise NAND chip that the company claimed can effectively double the capacity of a system's flash-based storage apparatus, "since MLC provides twice the capacity in the same die size as SLC" (single-level cell) flash memory.

The new MLC Enterprise NAND processor is capable of achieving 30,000 write cycles-a sixfold increase in endurance compared with standard MLC NAND, spokesperson Kirstin Bordner said.

At the same time, for enterprise applications that are more performance-driven, Micron introduced a 34-nanometer SLC enterprise NAND device that achieves a whopping 300,000 write cycles-a threefold increase over standard SLC NAND and the highest thus far in the industry, the company said.

Micron is now sampling both new enterprise NAND devices with systems makers and controller manufacturers for certification reasons, and is expected to be in volume production in early 2010, Bordner told eWEEK.

The new devices support the new ONFI 2.1 synchronous interface and improve data transfer rates by four to five times that of legacy NAND interfaces, Micron said.

Chris Preimesberger Chris Preimesberger was named Editor-in-Chief of Features & Analysis at eWEEK in November 2011. Previously he served eWEEK as Senior Writer, covering a range of IT sectors that include data center systems, cloud computing, storage, virtualization, green IT, e-discovery and IT governance. His blog, Storage Station, is considered a go-to information source. Chris won a national Folio Award for magazine writing in November 2011 for a cover story on Salesforce.com and CEO-founder Marc Benioff, and he has served as a judge for the SIIA Codie Awards since 2005. In previous IT journalism, Chris was a founding editor of both IT Manager's Journal and DevX.com and was managing editor of Software Development magazine. His diverse resume also includes: sportswriter for the Los Angeles Daily News, covering NCAA and NBA basketball, television critic for the Palo Alto Times Tribune, and Sports Information Director at Stanford University. He has served as a correspondent for The Associated Press, covering Stanford and NCAA tournament basketball, since 1983. He has covered a number of major events, including the 1984 Democratic National Convention, a Presidential press conference at the White House in 1993, the Emmy Awards (three times), two Rose Bowls, the Fiesta Bowl, several NCAA men's and women's basketball tournaments, a Formula One Grand Prix auto race, a heavyweight boxing championship bout (Ali vs. Spinks, 1978), and the 1985 Super Bowl. A 1975 graduate of Pepperdine University in Malibu, Calif., Chris has won more than a dozen regional and national awards for his work. He and his wife, Rebecca, have four children and reside in Redwood City, Calif.Follow on Twitter: editingwhiz

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