AMD Will Hammer Out 64-Bit Architecture
Tester's Choice: AMD's recent demonstration of its next-generation X86-64 "Hammer" processor technology was impressive.At a recent meeting, AMD demonstrated its next-generation X86-64 "Hammer" processor technology in action. From what I saw at the demo, the Hammer architecture is impressive, although its still too early to say if the Hammer will do well in the market. The heart of AMDs Hammer architecture, which will debut in the ClawHammer and SledgeHammer chips that are expected to ship in the fourth quarter, is the new microprocessor core thats designed to support current 32-bit applications as well as the 64-bit apps of the future. The Hammer design also features new performance-enhancing components, including an integrated DDR (double data rate) memory controller and the HyperTransport system bus technology. The HyperTransport is a high-speed chip-to-chip interconnect designed to eliminate bottlenecks between the processors and the I/O subsystems. Scalable HyperTransport links allow the Hammer to support two-way, four-way or eight-way multiprocessing architectures. Each HyperTransport link runs at 6.4GB per second, and each Hammer processor can support up to three links for an aggregate bandwidth of 19.2GB per second.
The Integrated Memory Controller increases the available memory bandwidth to the processor and reduces latency. The Hammer can house a single- or dual-channel DDR dynamic RAM controller.