Intel Plots Its Next Move

 
 
By John G. Spooner  |  Posted 2006-09-25 Email Print this article Print
 
 
 
 
 
 
 

At the fall developer forum, the chip maker will get down to planning its future.

Intel, after a series of moves designed to increase its efficiency, is attempting to get back down to business at its annual fall Intel Developer Forum on Sept. 26 in San Francisco.

The Santa Clara, Calif., chip maker holds two such forums a year in the United States, sharing numerous details about its future plans.
However, this time around, the question of what lies ahead for the chip maker has taken on added significance. Having witnessed a series of sweeping changes enacted by the company—including a management shake-up, a 10 percent work force reduction, and the jettisoning of parts of its communications and networking businesses—Intel partners, IT managers and others will expect the company to spell out what it can offer them now.

Paul Otellini, Intels CEO, who has not spoken publicly since Intel on Sept. 5 announced plans to cut 10,500 jobs, will be first to take the stage at IDF. Otellini, in an opening keynote, is expected to say a reinvigorated Intel will pursue leadership in processor performance and energy efficiency.

"With this IDF coming so soon after the layoffs … [Otellini] has really got to get out there and explain to the company loyalists—developers that have been with Intel through thick and thin and who live and die on the companys decisions—why the company is in better shape today than it was before the layoff announcements were made," said Charles King, an analyst at Pund-IT, of Hayward, Calif.

Click here to read more about Intels plans for the fall.
Otellini will likely stick to the basics, however. He will discuss performance and power—the two are not mutually exclusive, the chief executive will undoubtedly argue—while highlighting Intels forthcoming PC and server processors and discussing the future of the circuitry that underlies them, a company spokesperson said.

Thus, Otellini could add detail to Intels previously announced plan to accelerate the pace at which it introduces new products—one aspect of a larger plan to help it recover from a string of lackluster quarters in which it posted disappointing earnings; developed excess inventories; and saw market-share loss to rival Advanced Micro Devices, particularly in servers.

Intel, which has rolled out roughly 40 new products, including its Xeon 5100 for servers and its Core 2 Duo chip for desktops and notebooks, is now speeding arrival of its first quad-core processors, dubbed Kentsfield and Clovertown, for desktops and notebooks, respectively. Otellini is expected to highlight Intels quad-core strategy, likely presenting details of the companys plans to move from dual-core chips, such as the Core 2 Duo, to quad-core processors.

Indeed, the chip maker has already accelerated delivery of its two quad-core chips to appear in systems in the fourth quarter of 2006.

Kentsfield, for one, is expected to arrive as a Core Extreme processor for high-end desktops and workstations in early November. Intel will tout the chips performance for gaming as well as jobs such as editing videos.

Meanwhile, Otellini will touch on Intels plans to speed the pace at which it updates the circuitry underlying its PC and server chips. The chip maker aims to accelerate the introduction of new architectures, bringing them out every two years instead of every four to six years. Speedier transitions, Intel officials have said, are necessary to meet the goal of boosting chip performance while holding down power consumption.

Otellini may then offer greater details on "Nehalem" and "Gesher," two forthcoming architectures, due in 2008 and 2010, respectively. Thus far, Intel has said little about the two, outside of stating that moving between them will involve less radical changes.

The chip maker will continue to make manufacturing transitions—which generally shrink the features inside its chips, allowing them to add larger numbers of transistors—every two years. Intel will move to 45-nanometer manufacturing technology in 2007 and, during 2008, will introduce Nehalem, the follow-on to todays Core Microarchitecture, paring it with the 45-nm process. During 2009, Intel will jump to 32-nm manufacturing. Gesher will use that process when it arrives in 2010. Interim steps will see Intel produce a Core Microarchitecture chip using the 45-nm process—an update dubbed Penryn—in 2007 and Nehalem chips with the 32-nm process.

The company will combine the extra transistors allowed by the manufacturing improvements and the enhancements provided by the architectural changes to roll out higher-performing, multicore chips, Otellini is likely to say.

Intel executives including Pat Gelsinger, general manager of Intels Digital Enterprise Group; David Perlmutter, general manager of the Mobility Group; and Justin Rattner, Intels chief technology officer, also will give keynote addresses, offering additional insight into the chip makers desktop, server and mobile products as well as its work on data center power issues and design.

A range of technical discussions throughout the three-day IDF event will touch on topics such as Intels flash memory business, chip add-ons—such as virtualization technology—and R&D.

Check out eWEEK.coms for the latest news in desktop and notebook computing.
 
 
 
 
John G. Spooner John G. Spooner, a senior writer for eWeek, chronicles the PC industry, in addition to covering semiconductors and, on occasion, automotive technology. Prior to joining eWeek in 2005, Mr. Spooner spent more than four years as a staff writer for CNET News.com, where he covered computer hardware. He has also worked as a staff writer for ZDNET News.
 
 
 
 
 
 
 

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