Intel Switches Circuits to Save on Electricity

 
 
By John G. Spooner  |  Posted 2005-08-23 Email Print this article Print
 
 
 
 
 
 
 

The chip maker is rewriting its processor road map to deliver more power-efficient, dual-core and even quad-core chips.

SAN FRANCISCO—Even at Intel, the turtle sometimes wins the race. The Santa Clara, Calif., chip maker opened its three-day fall Intel Developer Forum, by rewriting the tale of the tortoise and the hare in Intel style.
It pledges to trade processors that flaunt outright speed for those that offer greater efficiency.
It officially abandoned the race to boost clock speeds in favor of honing its next generation of processors, due in 2006, to maximize the amount of performance they deliver per watt of electricity they consume. The company will achieve its goal of boosting performance per watt by rolling out new circuitry for its desktop, notebook and server chips, which will first arrive in the second half of 2006. Power consumption has already become a major factor in how notebooks PCs are designed.
Notebook processors must be designed to use less power and produce less heat than desktop or server chips in order to deliver long battery life and fit into the small confines of a notebook chassis. But power efficiency stands to weigh more heavily in desktop and server designs in the future as corporations demand servers that use less electricity and demand for smaller and less obtrusive desktops rises, Intel executives said at the Forum. Thus they chose the new approach. "We realized that power efficiency was critical," said Stephen Smith, vice president of Intels Digital Enterprise Group, during a briefing at IDF. Now "Our driving force is low power, high performance and what we call foundation for innovation—some common elements of the technology infrastructure that people can use to design systems and software," Smith said. The new architecture, which will span desktops, notebooks and servers for the first time in several years, will focus on getting more work done per clock cycle and favor multiple processor core chips, two elements the executives said will bump up its chips performance while holding down the amount of power they consume. Next Page: Pipeline assembly lines.



 
 
 
 
John G. Spooner John G. Spooner, a senior writer for eWeek, chronicles the PC industry, in addition to covering semiconductors and, on occasion, automotive technology. Prior to joining eWeek in 2005, Mr. Spooner spent more than four years as a staff writer for CNET News.com, where he covered computer hardware. He has also worked as a staff writer for ZDNET News.
 
 
 
 
 
 
 

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