Next-Generation Chips Tailored for Net Work

 
 
By Peter Coffee  |  Posted 2004-10-18 Email Print this article Print
 
 
 
 
 
 
 

Chips that focus on tasks may be the right idea at the right time.

General-purpose technologies spin off task-centered tools. The trick is to know the right time to set off in that direction. Do it too soon, and you produce an amusing relic; do it too late, and you become one.

The Fall Processor Forum, held at the beginning of this month in San Jose, Calif., offered well-timed examples of useful task-focused design. Initiatives such as the Octeon processor family from Cavium Networks remind me of a comment about the original Macintosh: "Its what got built once Apple knew what normal people wanted to do with a computer." In the same way, next-generation chips reflect our improving knowledge of the tasks theyll have to perform.

Microprocessors are perhaps the ultimate general-purpose device, but even their history reflects the eventual need for specialization. For example, early mainstream CPUs didnt have floating-point math hardware. The first IBM PC had an empty socket next to the 8/16-bit 8088 CPU, although IBM didnt admit knowing this could be filled with an 80-bit 8087 floating-point coprocessor (for which neither IBM nor Microsoft provided software support). Early PC applications, therefore, did floating-point math in software, with only a few (such as Autodesks AutoCAD) making the effort to use the math chip if present.

By the time wed all progressed, though, through the 80286/68000 (full 16-bit) and 80386/68020 (32-bit) generations of PC and Macintosh systems, it was clear that floating-point computation wasnt a niche. Beginning with 80486/68040 desktop machines, floating point came on board as part of the package. Developers on every mainstream PC and workstation platform can now assume the presence of floating-point hardware and use the corresponding high-speed instructions to write more-powerful software in less time.

The assimilation of floating-point hardware into PCs reminds me of the advent of cheap calculators, which freed high-school teachers from the need to make up easy test problems or teach slide-rule and table-interpolation techniques. When any feature goes into hardware, it becomes faster and more consistent as well as more accessible—whether in the classroom or inside a PC.

So far, though, floating point is one of the rare cases of a royal road for a co-processing capability. I remember an ancient Intel ad for a forthcoming "text coprocessor"—the 82730, I believe. Its almost impossible to find anything today about that apparently short-lived idea.

Thats why Im especially interested in several aspects of the Cavium Networks announcement that I mentioned earlier. Due next year, the Octeon "network services processor" family will include hardware accelerators for processor-intensive tasks that come up all the time in our Internet-centered workloads.

PKZip and related compression/ decompression algorithms, for example, get a hardware jump-start with the Octeons on-board coprocessor; intrusion detection and anti-virus protection will be aided by a regular-expression processor block offering up to 16 concurrent hardware engines. Crypto algorithms, including Triple DES and AES, will also have the benefit of on-board accelerators.

Packet processors and a TCP accelerator round out the Octeon arsenal of wire-speed capability at multi-gigabits-per- second data rates, all while running the rest of an application on multiple MIPS-architecture general-purpose cores (from two to 16 on a chip) at a comfortable 600MHz clock rate. If that seems slow, remember: High clock rates per se are not a benefit but a cost. More work per clock cycle is the goal.

With broad support, the Octeon could show up in anything from a grid computing workstation to a data center appliance. Regardless of the applications that are found for such a versatile device, though, it presents developers with a crucial trade-off: They can have a fairly small number of general-purpose chip designs, requiring task-specific software that creates many openings for bugs, or they can have a larger number of task-focused chips and tool chains that require additional developer investment to master and use. Well see if Octeon is the right idea at the right time.

Technology Editor Peter Coffee can be reached at peter_coffee@ziffdavis.com.

To read more Peter Coffee, subscribe to eWEEK magazine. Check out eWEEK.coms Desktop & Notebook Center at http://desktop.eweek.com for the latest news in desktop and notebook computing.
 
 
 
 
Peter Coffee is Director of Platform Research at salesforce.com, where he serves as a liaison with the developer community to define the opportunity and clarify developers' technical requirements on the company's evolving Apex Platform. Peter previously spent 18 years with eWEEK (formerly PC Week), the national news magazine of enterprise technology practice, where he reviewed software development tools and methods and wrote regular columns on emerging technologies and professional community issues.Before he began writing full-time in 1989, Peter spent eleven years in technical and management positions at Exxon and The Aerospace Corporation, including management of the latter company's first desktop computing planning team and applied research in applications of artificial intelligence techniques. He holds an engineering degree from MIT and an MBA from Pepperdine University, he has held teaching appointments in computer science, business analytics and information systems management at Pepperdine, UCLA, and Chapman College.
 
 
 
 
 
 
 

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