The company's QuickTransit technology allows software written for one processor to run on another platform.
On Monday, Transitive Corp. formally unwrapped its "hardware virtualization" technology, which allows software written for one processor to run on another platform.
The technology will be adopted and deployed by an undisclosed computer OEM in the fourth quarter, company executives said, and five more manufacturers are expected to announce support for the technology next year.
Transitives new QuickTransit technology is reminiscent of Transmeta Corp.s "code-morphing" technology, which can translate and recompile code written for an x86 processor, for example, onto its own internal microarchitecture. The techniques that Transitive have developed, however, could allow an application written for the AIX operating system on IBMs Power architecture to run alongside an application written for Suns Solaris OS on an UltraSPARC processorall on top of an Itanium chip produced by Intel Corp.
Los Gatos, Calif.-based Transitive is pitching the technology as one that can bring applications written on legacy hardware, such as IRS software that was written in the 1970s, onto up-to-date platforms, according to Bob Wiederhold, the companys CEO and president.
"All of them are orphaned on very old hardware," he said.
The QuickTransit technology uses a core kernel, with a modular back end that plugs into the target hardware. Likewise, a series of modular front ends provide a limited number of architectures that the technology can virtualize, with more on the way.
For now, the company is offering four target modulesthat is, the physical processors the technology will run on: Itanium, Advanced Micro Devices Inc.s Opteron, the Pentium 4 x86 architecture and the PowerPC.
The QuickTransit technology can virtualize any mainframe operating system on all four processor architecture back ends, according to the company. In addition, the Itanium, Opteron and x86 back ends will virtualize the MIPS architecture. Both the Opteron and x86 products will also allow a virtualized Power or PowerPC architecture to run on top of them; likewise, a PowerPC chip can also run an x86-designed operating system, such as Windows, on top of it.
Click here to read about AMDs "Pacifica" virtualization technology.
Company executives said the technology could be used to run Apple Computer Inc.s Mac OS on top of an x86 processor. However, the technology will most likely not be sold to individual users, so a company such as Hewlett-Packard Co. would have to decide to license the technology and include it with their PCs.
On average, translating the various instructions will produce about 80 percent of the computational performance of a native compilation, said Frank Weidel, lead solutions engineer at Transitive. The QuickTransit kernel also requires a memory penalty of about 25 percent per application, Weidel said. The amount of memory an application uses for data is not affected. However, the multiple instances of the technology will run side by side; for example, the company has been unable to break the QuickTransit application running 200 instances of the technology alongside one another, he said.
QuickTransit has been tested on 64-bit applications, as well as for compatibility between 32-bit applications written on a 64-bit architecture, Weidel said.
The technology maintains compatibility by translating blocks of instructions into an intermediate representation, then optimizing the code. If the software discovers loops of frequently used code, that code is stored in the cache. According to Weidel, the technology can handle operating-system and graphics calls to specific registers through a "call mapper" that intercepts and passes on the request to the target hardware to maintain compatibility.
According to Weidel, the technology can handle calls and functions written to specific technologies not included in the target hardware, such as SS2 instructions specifically encoded in the latest Intel Pentiums that are not included in the PowerPC.
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Editors Note: This story has been corrected on Sept. 13 at 4:33 PM PDT. A previous version of this story mischaracterized the performance of the virtualized microprocessor and application.