Data Bandwidth: Memory Should Take Pride of Place

What looks like an insurmountable problem may just be a well-disguised assumption. The problem of data bandwidth across the border of a microprocessor chip may just be a symptom of the assumption—that the so-called central processor has to be at the center of the machine, with memory as a peripheral. What would happen if memory took "pride of place," with processing power arrayed around its edges?

Micron Technology Inc.s Yukon device, soon to cross the line from concept to prototype, answers this question—not with a replacement for the CPU but with an additional system resource of distributed processing power that can take full advantage of the 200G-bps bandwidth inside a synchronous dynamic RAM chip.

In applications such as image processing and data mining, a relatively small number of operations are executed against a huge volume of data. Simple processing elements, placed as close as possible to the data, can receive their instructions from a more general-purpose device and then turn their power loose without constantly fighting cross-chip bottlenecks.

At 200MHz, the Yukon prototype should deliver peak processing rates exceeding 50 billion eight-bit operations per second or sustained processing rates of more than 200 million double-precision floating-point operations per second, according to the Microprocessor Forum presentation by Microns Graham Hirsch, chief architect of the companys Active Memory Program.

"Memory is not the problem," said Hirsch, at the forum in San Jose, Calif. "The bus is the problem. Picking up data, moving it and putting it down is the problem. The bandwidth inside a memory chip is very large. There should be some way of using that."

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