Code-named "Redwood" showcased at Intel Developer Forum. Technology could provide a physical interface for HyperTransport or a combination of a physical layer with Redwood's own signaling layer for an additional "turbo mode".
Rambus formally launched its chip-to-chip interconnect, code-named "Redwood", and has positioned it as the physical interface over which next-generation buses will be run.
Rambus provided an overview
of the technology last month, when the company disclosed that Sony would be using the technology in next-generation entertainment products, without specifically naming the PlayStation.
However, Rambus executives were much more specific on how they intend to position Redwood namely, as either a physical interface for HyperTransport, or a combination of a physical layer and Redwoods own signaling layer for an additional "turbo mode". Rambus hopes that designers will adopt its complementary RaSer interface for implementing PCI Express, executives said.
Executives will present a technical session at this weeks Intel Developer Forum, said Rich Warmke, director of marketing for the memory interface division at Rambus. "IDF was chosen as a good forum to address future solutions, such as chip interfaces," Warmke said.
Following a controversial patent enforcement effort, Rambus faded from the PC spotlight for several years. However, a recent ruling
has allowed the Rambus patent litigation to proceed, and SIS recently disclosed that it planned a quad channel
chipset. Meanwhile, Rambus has been hard at work designing Redwood, a complement to the relatively old RaSer technology, which Rambus originally designed for networking implementations.
Redwood should be considered as "two broad applications", Warmke said. First, Redwood will work as a physical layer or PHY, providing a physical interface for existing parallel buses, such as HyperTransport or RapidI/O.
"We can also offer a higher speed turbo mode that current interface standards arent addressing," Warmke said.
For example, the Redwood technology was designed to provide 6.4 Gbits of bandwidth per signal per pair, specifics Rambus hasnt provided before. Meanwhile, HyperTransports current implementation offers 3.2 Gbits/s of bandwidth using a 800-MHz clocked bus and a 2-bit wide link. Rambus claims that its technology can support "virtually any width of bus," Warmke said, while HyperTransport has currently defined bit widths up to 32 bits wide.
Redwood doesnt have a need for either "8b" or "10b" encoding which can rob other buses of data traffic through overhead management, Warmke said. Redwoods clock signals are multiplexed onto data lines requiring two out of every ten to communicate clock information. This allows signal traces to be of varying length, up to a total of 15 inches, he said. The Rambus RaSer technology uses an embedded clock.
Rambus is working with a number of customers on the technology, Warmke said. Like last month, Warmke declined to comment on when the technology could be implemented in board and system solutions.