Reducing Power Leakage
In the case of Intel, the company's paper on 32-nm processors will detail how engineers plan to use Intel's second-generation high-k metal gate technology, which reduces power leakage-the electricity wasted while the transistors sit idle-to help boost the overall performance of the Westmere line of chips. Intel has already demonstrated a 291-megabit SRAM test chip that contains more than 1.9 billion transistors and has a test clock speed of 3.8GHz. The paper also details the use of low-k interconnect dielectrics or insulators within the chips. "The fact that the transistors are smaller and can be packed closer together means a couple of things," said Mark Bohr, an Intel senior fellow and the company's director of processor architecture and integration.The Intel paper, which will be presented by Sanjay Natarajan, Intel's program manager for 32 nm, will also detail the company's efforts at 193-nm immersion lithography. Unlike dry lithography, which uses air to fill the gap between the silicon wafer and the lens, immersion lithography uses water. This allows for a higher resolution when the circuit patterns are being etched onto the silicon. In addition to the technical paper discussing 32-nm developments, Intel engineers will detail the company's efforts to build a derivative of its current 45-nm processor that will allow for a new type of SOC (system-on-a-chip) design. In this paper, Bohr said Intel engineers will describe how they created a 45-nm SOC processor that reduces power leakage to offer better battery life, which will help when building new types of handheld devices such as smartphones. Intel is working to incorporate analog technology into this SOC processor. During the year, Intel executives have hinted that the company's Atom processor could eventually be used as a substitute for more traditional ARM processors that are used in most of today's cell phones and smartphones.
"It will take less power to switch these transistors on and off. So, in a typical microprocessor chip, if the features are packed down, it will consume less power," said Bohr. "The fact that the transistors operate faster means that some of our products will have a higher clock speed than what they did before, and the fact that transistors are smaller means that you could fit more cores into a chip."