Intel Rolls Out Nehalem with New Virtualization, Power Features

 
 
By Jeffrey Burt  |  Posted 2009-03-30 Email Print this article Print
 
 
 
 
 
 
 

Intel officials, touting new performance, energy efficiency and virtualization capabilities, unveiled the new Xeon 5500 series-once known as Nehalem EP-for the high-volume server space. Intel's new processor architecture includes an integrated memory controller, better I/O capabilities and energy efficiency technology that includes the ability to boost power to individual processor cores when necessary. Rival AMD downplayed Intel's announcement, but analysts say the new architecture offers significant advancements.

Intel March 30 officially rolled out its "Nehalem EP" Xeon processors for two-socket systems, with officials touting the performance and efficiency gains as well as the improvements in virtualization capabilities.

At an event in Santa Clara, Calif., Pat Gelsinger, senior vice president and general manager of Intel's Digital Enterprise Group, touted the new chips-officially called the Xeon 5500 series-as the most significant processor launch since the Pentium Pro was released in 1995.

The Xeon 5500 series is "as significant and transformational as the Pentium Pro was in its day," Gelsinger said.

The announcement was the latest step in the ongoing rollout of Intel's Nehalem architecture, which is replacing the chip maker's core architecture. The first of the Nehalem chips, for high-end PCs and workstations, were launched in the fall. The Nehalem EX chips, for servers with four or more sockets, are expected to launch later this year.

During a 50-minute presentation, Gelsinger outlined significant enhancements in Nehalem in the areas of performance, energy efficiency and virtualization. He said that the quad-core 5500 series had set more than 30 records for performance in the two-socket server space, and more than doubled the performance of the current 5400 series.

The Xeon 5500 series, built on the 45-nanomter manufacturing process, also offers triple the memory bandwidth of previous chips and can dynamically adjust to multiple and disparate workloads and conditions. Gelsinger focused on Turbo Boost, a feature that enables IT administrators to dynamically boost or lower the clock speed of individual cores depending on utilization and demand.

"All of a sudden, you get more horsepower for your engine," he said.

Other performance features include an integrated memory controller, similar to what Advanced Micro Devices has offered on its Opteron chips since 2003, and the QuickPath chip-to-chip interconnect.



 
 
 
 
 
 
 
 
 
 
 

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