: Pentium 5"> Intel also is finalizing production plans for a chip, code-named Prescott, that sources said will become the Pentium 5. The chip will be made using a 0.09-micron manufacturing process that will shrink the die size and cut Intels production costs per chip. Due for release at 3.2GHz in the second quarter of next year, the chip will feature 1MB of Level 2 on-die cachetwice as much memory as current Pentium 4s have. Larger on-die caches improve a chips performance by reducing the time it needs to access memory.On the server side, Intel, of Santa Clara, Calif., and several computer makers at the forum will demonstrate early versions of the third-generation 64-bit Itanium processor, code-named Madison, which will become the Itanium 3 when it arrives in the middle of next year. It will be released at 1.5GHz and feature 6MB of on-die Level 3 memory cache, twice as much as in the Itanium 2, which was released in July. In addition, Intel will release a version of the Itanium, code-named Deerfield, designed for use in blade servers. The processor will feature the same architecture as in the Itanium 2 but will be made using the 0.09-micron process, which will cut the chips energy consumption and the amount of heat generated from the chip, key concerns in designs for blade systems. On the mobile front, Intel will tout a whole new processor architecture it will introduce in the first half of next year, codenamed Banias. The chip, which will be released at 1.4GHz and 1.6GHz, features several performance enhancements that Intel insiders say will enable it to outperform mobile Pentium 4 chips running at clock speeds of more than 2GHz. In addition, Banias incorporates a new energy-efficient design that essentially turns transistors on and off as needed while the chip processes data. The technology reduces power consumption by the chip and thus helps to extend batter life of notebook PCs. Related stories:
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Along with Prescotts release, Intel will introduce a chip set, code-named Springdale, which will feature a 333MHz, dual-channel, double-data-rate synchronous dynamic RAM memory controller and will support Prescotts 667MHz front-side bus speed.