Intel Technologies Add More Bang to Chips

 
 
By eweek  |  Posted 2001-10-16 Email Print this article Print
 
 
 
 
 
 
 

Researchers at the chip maker detail two new technologies designed to boost processor performance without raising the chip's speed, examples of what the company contends is its "move beyond megahertz."

SAN JOSE, Calif.—Intel Corp. researchers on Monday detailed two new technologies designed to boost processor performance without raising the chips speed, examples of what the company contends is its "move beyond megahertz." The technologies—hyper-threading and speculative precomputation—would improve the way Intels chips receive and process data, essentially tweaking more performance out of existing architectures.
Intel began stressing its emphasis on improving chip performance right after the company released its 2GHz Pentium 4 in late August. At the time, Paul Otellini, general manager of Intels architecture group, said the chip maker had moved beyond merely seeking to produce faster chips and was focusing on improving the overall performance of its products.
Hyper-threading was initially revealed at the Intel Developers Forum in late August, but on Monday the chip maker, of Santa Clara, Calif., used the gathering at the Microprocessor Forum to serve up a few more details and reveal some early benchmarks showing 18 performance to 30 percent performance improvements on various applications. "This is a significant new technology direction for Intel going forward," said Glenn Hinton, an Intel fellow and director of the companys 32-bit micro architecture development. While the technology will first be integrated into Xeon processors for workstations and servers next year, he said the design will also likely be implemented in other Intel processors as well.
In fact, the Pentium 4 may already have hyper-threading designed into, industry insiders say. The Xeon is based upon the Pentium 4, except that it has larger on-die memory. After his speech, Hinton appeared to confirm such speculation is correct. "At various times, we have designed prototypes of things into our silicon that would only be turned on for our own prototype testing," he said. "We might have done that here." Hyper-threading essentially works by fooling multiprocessor applications into seeing one chip as two virtual CPUs. As a result, applications send more data to the chip simultaneously, taking advantage of resources that would have gone untapped, even if only for a nanosecond or two, under current designs. Intel benchmarked the performance improvements in a test using its own 1.6GHz Xeon chip, adjusted so that hyper-threading could be turned on or off. On Microsoft Active Directory, a filer server application, hyper-threading recorded an 18 percent performance improvement. On Microsoft Corp.s SQL Server, a database application, it resulted in a 22 percent performance gain. The technology posted its best performance on Microsoft IIS, a Web server application, where it posted a 30 percent performance gain. Speculative precomputation Also at the Microprocessor Forum, an Intel researcher spoke publicly about another performance enhancing technology the company is working on, called speculative precomputation (SP). The new design is targeted at addressing memory latency, which is becoming an increasing problem as CPU clock speeds advance more rapidly than memory access times, said John Shen, director of Intels Microarchitecture Lab. While hyper-threading aims to deliver more streams of data to a single chip, SP is focused on improving how the chip handles each of those streams. Basically, the design appears to server as an enhanced form of prefetching. Prefetching, which Intel first implemented on the Pentium III, helps boost chip performance by having the processor predict what data it will likely need when running a program and calling that data into its cache ahead of time. "[SP] targets load instructions that have been difficult to handle through normal prefetching, such as ones that dont have predictable access patterns," Shen said. Performance improvements through SP would vary widely, Shen said, but could potentially top 100 percent in applications where current prefetch techniques have so far proven unsuccessful.
 
 
 
 
 
 
 
 
 
 
 

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