Centaur Builds Security into X86-Compatible Chips

Security moved toward mainstream hardware Tuesday morning with the announcement of Centaur Technology's new X86 processor at Microprocessor Forum.

SAN JOSE—Security algorithms moved toward mainstream hardware implementation with a Tuesday morning announcement by Glenn Henry, (as seen in photo above) president of Centaur Technology, here at this weeks Microprocessor Forum. Henry described the addition of basic security operations, such as random-number generation and AES encryption, to his companys line of X86-compatible microprocessors. The new features require the introduction of a new X86 binary operation code but do not require support from the operating system. The executive compared security to 3D graphics, another computationally-intensive task formerly considered too specialized to put into general-purpose processors.
"Hardware is faster and everyone is going to need it, so why not?" he said, adding, "It costs practically nothing in terms of the silicon required, so were doing it to see if people think its important." Henry contrasted his companys approach against the Next-Generation Secure Computing Base program, formerly known as LaGrande or Palladium, and advanced by Intel Corp., Microsoft Corp. and others. "The grand schemes from Intel and Microsoft will take a long time to get here and wont solve the problem theyre intended to solve," he said. "Our strategy is to furnish primitives to applications," he added, describing his goal as enabling application developers and users to enjoy speed and low cost in tailoring security to specific needs.´