Intel Details Nehalem, SOC Processor Technologies at Conference

 
 
By Scott Ferguson  |  Posted 2009-02-05 Email Print this article Print
 
 
 
 
 
 
 

At the International Solid-State Circuits Conference later this month, Intel engineers will detail 15 new technical papers that will deal with a range of issues, including an in-depth look at Intel's Nehalem architecture as well as the chip maker's plans for new types of system-on-a-chip processors for a range of new products. Intel also plans to detail its efforts at improving wireless technology and graphics at the chip level.

Intel is planning to use an upcoming technical conference to offer an in-depth look at its Nehalem microarchitecture and offer details about how the chip giant plans to develop a new type of systems-on-a-chip processors for products ranging from handset devices to server systems.

In addition to these processor developments, Intel engineers plans to detail new techniques that will integrate more wireless technologies, including WWAN (wireless WAN) and WLAN (wireless LAN), onto the silicon die itself in order to boost the ability to send and receive data from a number of different mobile devices.

Finally, Intel is expected to detail its efforts at integrating new graphics technologies within its microprocessor silicon.

All together, Intel engineers plan to discuss 15 different technical papers at the 2009 International Solid-State Circuits Conference, which starts Feb. 8 in San Francisco. Intel, along with other chip companies such as Advanced Micro Devices and IBM, typically use this show to highlight future chip developments and expand on their future processor road map.

In terms of Nehalem, Intel engineers will not break any new ground at this year's conference, but Mark Bohr, an Intel senior fellow, plans to discuss additional details about several upcoming Xeon processors that are based on this new microarchitecture.

The chip, now called Nehalem-EX, is built on the Intel's 45-nanometer manufacturing process and contains 2.3 billion transistors. The Nehalem-EX processor also contains eight processing cores with each core using two instructional threads for a total of 16 threads. Intel executives first described the Nehalem-EX chip at the company's Developer Forum and it will hit the high-end server market later this year.

Other Intel papers will describe future Nehalem-based processors for other types of servers, desktops and laptops. Intel is expected to release new chips for these markets in the coming months.

However, Bohr also plans to focus some time on how Intel is conceiving a new generation of SOC processors that will pack even more technologies into a single processor or die package.

These developments, Bohr said, will allow Intel to keep pace with Moore's law, which states that computer processing power doubles every 18 months. In addition, these new types of SOC processors can lead to the development of new types of devices, including MIDS (mobile Internet devices), as well as laptops, server systems and different types of consumer electronics.

The starting point for this future vision is Nehalem and Intel's 45-nm manufacturing, which allowed Intel to integrate the memory controller onto the processor for the first time with these new chips. (AMD has used an integrated memory controller with its Opteron processors for a number of years.)

From here, Bohr sees a future where more and more components are placed within the die or right onto the processor itself. Intel is calling these chips "smart SOCs."

"Chips are much more than just digital logic," said Bohr before the conference. "They are really complex systems on a chip that involve digital logic, memory circuits, analog circuits, on die sensors and adaptive circuits... In the future, SOC products will merge more and more of these systems components onto a single chip or at least within a single package."

In addition to these various components, Intel is looking to build various wireless technology capabilities into the processors themselves. This is another critical step to developing the smart SOCs that Bohr plans on detailing at the show.

The first obstacle that Intel engineers plan to overcome is cleaning up the harmonics to allow for clearer and stronger wireless signals. Another Intel paper describes a chip component that allows for gigabit wireless, which will allow devices to transmit and receive data much faster and across greater distances. When these new types of chip technologies are perfected, Intel believes that it can create devices that can support Wi-Fi, WiMax, 3G and Bluetooth.

These types of technologies also show that Intel is increasingly interested in moving its x86 processor technology out of the traditional PC market and into more handset devices such as MIDs, cell phones and smartphones.

A final set of papers deals with improving graphics within the silicon, especially when it comes to smaller devices. The goal here is to boost performance, while reducing the amount of power the graphics use.

However, Intel engineers pointed out that this research is not being developed into a specific processor or SOC chip at this time.

 
 
 
 
 
 
 
 
 
 
 

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