The Sunnyvale, Calif., chip maker on May 16 previewed a quad-core processor design the company said it will use to create higher-performing Opteron chips, in addition to boosting some of its other chip lines, during 2007.
AMD, which has recently been gaining market share over its rival Intel, aims to keep the pressure on with the quad-core design, which incorporates a number of new features.
"We actually have had to do a lot of work on a per-core basis to lower [power consumption]," said Senior AMD Fellow Chuck Moore, who spoke at the Spring Processor Forum in San Jose, Calif., where the new design was announced.
As a result, the quad-core Opterons will offer the same power consumption levels as AMDs current dual-core Opterons—most of which use about 90 watts—despite the extra cores, Moore said.
To achieve that goal, AMDs quad-core designs will incorporate a number of new elements. Among them are redesigned processor cores, extra onboard cache and the addition of a higher-bandwidth version of the HyperTransport interconnect. AMD will also mint the chips using its forthcoming 65-nanometer manufacturing process, Moore said in his presentation.
The processor core revisions are designed to allow each core to do more work per clock cycle. AMD also beefed up the floating-point units, generally used for number-crunching and multimedia-extension processing capabilities associated with the cores.
On the chip level, AMD engineers added a shared Level 3 cache—an extra pool of memory used to store data close to the processor cores—to help feed data into the cores individual Level 2 caches. The L3 cache, which was designed to vary in size, can be accessed by any of the four cores. However, AMD engineers gave each processor core its own L2 cache on the grounds that sharing those caches can result in one or more processors cores fighting access, which exacts a cost in performance.
The engineers also fitted the quad-core chip design with HyperTransport 3.0, which offers more than double the bandwidth of its predecessor, thus increasing the size of the pipe used to move data into and out of the chip.
While adding these performance-oriented features, AMD engineers also built in some power-saving tricks. For example, cores not being used can be shut down.
AMD will also make provisions for DDR2 SDRAM (double-data-rate synchronous dynamic RAM) and, when the company is satisfied with the technology, FB-DIMMs (fully buffered dual in-line memory modules), which add a buffer chip to enhance performance. At the moment, AMD said, the power use of the FB-DIMMs—each modules buffer chip consumes roughly 6 watts—outweighs their performance advantages.
Ultimately, the effort AMD put into creating the quad-core Opteron will pay off in other areas, as the chip maker will use the design in other chips, Moore said.
"Itll start in the Opteron family and itll trickle down into the rest," he said.
AMD has said it will follow the quad-core chip with a move to a redesigned processor architecture around 2008 or 2009.
Meanwhile, rival chip maker Intel, of Santa Clara, Calif., is also working to deliver quad-core chips in 2007.
So far, Intel has shown off a quad-core Xeon, code-named Clovertown.
Following a logical progression, eight-core PC processors may become possible with the next generation of manufacturing technology, 45 nanometers, which Intel said it expects to begin rolling out some time in 2007.