With the arrival two months from now of Apple Computer Inc.s new desktop machines and their 64-bit CPUs, the race to the next generation of mass-market processing power suddenly has a third horse running hard. Intel Corp.s Itanium, Advanced Micro Devices Inc.s Opteron and Athlon 64, and now the IBM PowerPC 970 (or G5) processor in forthcoming Apple systems offer distinctly different options to users of memory-intensive applications.
Indeed, the P4 has been almost too successful: Intel introduced the architecture now called Itanium by arguing that buyers needed to abandon x86 software and skills to attain the next level of performance, but the P4s progress has weakened that claim.
Intel celebrated the graduation season by shipping a 3.2GHz P4 that should enjoy a short but hot summer as leader of the pack. At the end of next month, however, the P4 will return from the holiday weekend to labor against the Athlon 64s offer of x86 compatibility combined with 64-bit headroom.
PC users who remember the debut of the 32-bit 386 chip will understand the immediate value proposition of AMD64 architecture, even in a world of 32-bit packaged software. Just as "DOS extenders" provided independent execution environments to 16-bit applications on 32-bit machines, so AMD promises that 32-bit applications will benefit from having the elbowroom of separate 4GB neighborhoods within their 16-exabyte universe.
Applications for the Itanium, which uses a completely different architecture rather than an x86 superset, must also be recompiled to run in anything but a sadly underperforming x86-compatibility mode. But Itanium compilers must do more: The Itanium achieves relative simplicity of hardware by requiring that compilers support Explicitly Parallel Instruction Computing (hence the Intel acronym EPIC) in application binaries. A mature Itanium software base is still a distant goal.
Intel proposes to remedy the bandwidth bottlenecks of loading all those explicit instructions by providing enormous cache memories. The dual-core Itanium planned for 2005 is expected to have 18MB of on-chip cache.
The PowerPC 970 chip in the new Apple machines, by contrast, is the baby brother of the IBM Power4 processor, which is among the titans of bit-stream bandwidth; the 970s potential is well-supported with a fast front-side bus. Like the AMD64 architecture, Apples 64-bit machines use the multivendor HyperTransport protocol for improved throughput among other subsystems as well.
Also like the AMD64-family processors, the PowerPC 970 has substantial compatibility with the 32-bit G4 software base (with a few exceptions and key performance gotchas). Overall, it appears to deserve the "G5" appellation connoting continuity with Apples G4 machines.
Power consumption of the G5 looks to be about three-fourths that of a P4 when clocked for comparable performance—the G5s efficiency and speed may quickly spread its use from Apples top tier throughout the rest of its line and may also make Apple a top-tier option for even the most performance-conscious users.
Technology Editor Peter Coffee can be reached at firstname.lastname@example.org.