Since 2007, Intel's tick-tock processor schedule has gone off like clockwork. It's what has helped the chip maker drive Moore's Law while continuing to shrink the size of its processors.
That's about to change. During a conference call with journalists July 15 to talk about the company's latest quarterly financial numbers, Intel CEO Brian Krzanich said the vendor will add a third 14-nanometer processor—dubbed "Kaby Lake"—to its road map, pushing back the timetable for its 10nm processor to the second half of 2017.
The decision highlights the increasing manufacturing challenges Intel and other chip makers are running into as they shrink the circuitry of the chip. Intel had similar issues as it moved from the 22nm manufacturing process, delaying the launch of the 14nm "Broadwell" architecture by several months.
"This is similar to what happened on the 14-nanometer," Krzanich said. "On all of these technologies, each one has its own recipe of complexity and difficulty. [The move from] 14-nanometer to 10-nanometer [is the] same thing that happened from 22-nanometer to 14-nanometer. The lithography is continuing to get more difficult as you try and scale and the number of multipattern steps you have to do is increasing."
The tick-tock schedule has helped Intel keep its lead in the chase of Moore's Law over other chip makers. On a "tick" year, Intel unveils a microarchitectural change, such as the first move to 14nm with Broadwell. The "tock" will happen later this year when Intel releases "Skylake," another 14nm chip with an array of enhancements for improved performance and energy efficiency.
The next step was expected to be another "tick," with the introduction later in 2016 of the first 10nm processor, "Cannonlake." However, with Kaby Lake, the schedule has now turned into what one analyst calls a tick-tock-tock pattern. Krzanich noted that as manufacturing process has continued to shrink, the schedule has elongated.
"When you look at the pattern we've been having with the same kind of sets of conditions—which was the 22-nanometer technology and the 14-nanometer technology—we said those took about two-and-a-half years," the CEO said, adding that Intel has gotten feedback "from our customers, who said, 'Look, we really want you to be predictable. That's as important as getting to that leading edge.' We chose to actually just go ahead and—since nothing else had changed—insert this third wave [with Kaby Lake]."
Intel will try to get back to a two-year schedule, but company officials will have to continue to evaluate the situation as the process moves from 10nm to 7nm and lower, Krzanich said.
Moore's Law is celebrating its 50th anniversary this year. It was in 1965 that Intel founder Gordon Moore predicted that the number of transistors in a semiconductor would double every year, leading to more powerful and less costly processors. The prediction—which has been slightly amended over the years—helped usher in the PC era and later the development of such systems as smartphones, tablets, wearables, and the billions of devices and sensors that make up the growing Internet of things (IoT). IBM engineers last week announced it was extending Moore's Law with the introduction of a 7nm test node.
Krzanich said that even with the delay of Cannonlake to 2017, "our lead in Moore's Law will not change dramatically. We believe we'll continue to lead with roughly the same leadership position that we have today."
That belief is based on plans to ensure large volumes of the 10nm chip hitting the market in 2017, and the continued development of the technologies going into the chips. For example, by the time Cannonlake comes out, Intel will be on its third generation of the FinFET transistor architecture.
In addition, "if you take a look at the scaling, it will be very strong relative to normal scaling parameters that occur with the Moore's Law transition," he said. "I'm not going give you the exact numbers right now, but if you combine all those, our leadership position doesn't change, even with this date [change]."