Intel Channels 'Larrabee' for HPC Processor Architecture

 
 
By Jeffrey Burt  |  Posted 2010-06-02
 
 
 

Intel engineers are taking what they learned with the now-shelved "Larrabee" graphics chip project and with their multicore single-chip cloud computing strategy to create a co-processor architecture aimed at the high-performance computing market.

At the International Supercomputing 2010 show May 31, Intel officials introduced "Knights Corner," the foundation for what they called the MIC ("Many Integrated Core") architecture that will handle the highly parallelized processing workloads common in the HPC field and that are increasingly being run on systems powered by x86 CPUs and general-purpose graphics chips from the likes of Nvidia and Advanced Micro Devices.

Knights Corner will be made using Intel's 22-nanometer manufacturing process and will scale to more than 50 cores on a single chip, according to Kirk Skaugen, vice president and general manager of Intel's Data Center Group, who talked about the project during his keynote speech at the ISC show in Hamburg, Germany.

Intel officials have argued that the vast majority of workloads-even those in the HPC space-can be handled via their Xeon processors. However, the MIC architecture will be aimed at highly parallel applications.

Intel is working at improving its parallel development tools, according to officials.

"Intel's Xeon processors, and now our new Intel Many Integrated Core architecture products, will further push the boundaries of science and discovery as Intel accelerates solutions to some of humanity's most challenging problems," Skaugen said in a statement. "The Intel MIC architecture will extend Intel's leading HPC products and solutions that are already in nearly 82 percent of the world's top supercomputers. Today's investments are indicative of Intel's growing commitment to the global HPC community."

Nvidia and AMD have been aggressive in pushing GPUs as co-processors for x86 processors in hybrid HPC systems. A number of vendors are rolling out such hybrid systems, the largest being IBM, which in May announced it was putting Nvidia Tesla GPUs into a new version of its Intel-powered iDataPlex HPC servers.

Intel was working on a similar project called Larrabee, which it shelved in December 2009 because of development issues. However, in a May 25 blog post, spokesman Bill Kircos said that while Intel was in no hurry to create another discrete GPU, it was still working on enhancing the graphics capabilities in its chips. Kircos also hinted at the Knights Corner project.

However, unlike what Nvidia and AMD are doing with their GPUs, Intel is developing an architecture based on standard x86 instructions.

Along with the Larrabee project, Intel is also incorporating what it's learned in developing its 48-core single-chip cloud computer, which it unveiled in December 2009, and the 80-core "Polaris" processor that it showed off in 2007.

Intel is creating 32-core development versions codenamed "Knights Ferry" that are being passed out to select customers. A CERN lab team migrated a complex C++ parallel benchmark to the MIC software development platform in a matter of days, according to CERN officials.

In the second half of the year, the chip giant will expand the program to include more developer tools for the MIC architecture.

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