SuVolta Gets $17 Million for PowerShrink Chip Platform
SuVolta, a Silicon Valley startup whose PowerShrink platform is designed to drastically reduce the power consumption in microchips, is getting another $17.6 million in financing in a tight investment environment for semiconductor technologies.
Company officials announced Jan. 5 that the latest round of funding is coming from current investors that include Kleiner Perkins Caufield & Byers, August Capital, New Enterprise Associates (NEA), Northgate Capital and DAG Ventures, as well as new investor Bright Capital. The added funding, at a time when investment dollars are hard to come by, is an indication that SuVolta is on the right track with its focus on reducing power consumption, according to President and CEO Bruce McWilliams.
"Power is now the biggest design constraint for electronic products," McWilliams said in a statement. "This funding demonstrates the excitement surrounding our technology which dramatically reduces power consumption in ICs [integrated circuits]. Lowering power consumption has far-reaching benefits for a range of applications and products including mobile devices."
To Forest Baskett, general partner at NEA, the work that SuVolta is doing is the type that needs to be promoted and enhanced.
"While the past five years have produced impressive innovations with the Web and mobile devices, it's just as important that we continue advancing the underlying technologies that make these innovations possible," Baskett said in a statement. "Unfortunately, the funding for core semiconductor technology has significantly declined over the same period. Funding a venture like SuVolta is important because we need companies striving to truly disrupt the status quo in the semiconductor industry."
SuVolta pointed to numbers from the Global Semiconductor Alliance that supplier funding in 2007 was $717.5 million, but dropped to $272.2 million in 2010. The group expects funding in 2011 to come in at about half of the 2010 numbers.
SuVolta came out of stealth mode in June, unveiling its PowerShrink platform. Company officials have said PowerShrink, through new transistor technology called Deeply Depleted Channel (DDC) and DDC-optimized circuits and design techniques will help drive down voltage by more than 30 percent, which in turn will reduce power consumption in chips by as much as 50 percent without impacting performance. In addition, semiconductor companies using the process won't have to invest in costly new manufacturing plants or equipment.
DDC essentially reduces the variations in power needs of individual transistors within the chip, cutting electrical waste and making voltage requirements more predictable, officials said in December, when they gave greater detail around the transistor technology. The company is aiming for the PowerShrink platform to be used in a variety of IC platforms beyond just chips, including static random-access memory (SRAM) and system-on-a-chip (SoC) architectures.
Fujitsu officials announced in December that their company is integrating PowerShrink into its low-power processor technology. Fujitsu has demonstrated the technology on some products, and chips made with the SuVolta technology are expected to hit the market in the second half of 2012.
Energy consumption has become a key factor for chip makers given the rapidly growing use of Internet-connected mobile devices like tablets and smartphones, most of which use SoC offerings designed by ARM Holdings and manufactured by the likes of Samsung, Qualcomm and Nvidia. Both Intel and Advanced Micro Devices are looking to drive down the power consumption of their x86 chips. With the release this year of its "Ivy Bridge" processors, Intel will be introducing its Tri-Gate three-dimensional transistor technology, which is designed to drive up performance and energy efficiency.