ARM is making a strong push into the supercomputing space as the industry continues its march toward exascale computing.
Officials with the company, whose chip designs can be found in most smartphones and tablets and are working to make their way into enterprise servers, provided more information on a new chip design that includes vector processing capabilities, which will enable the chips to better process many of the workloads being run in high-performance computing (HPC) environments today.
ARM engineers detailed the company's Scalable Vector Extension (SVE) technology Aug. 22 at the Hot Chips 2016 show in Cupertino, California. The new design will be based on the company's 64-bit ARMv8-A architecture and will enable chip makers to leverage the SVE technology to bring vector processing to their ARM-based chips.
The SVC allows for flexibility, with scalable vectors lengths ranging from 128 bits to 2,048 bits in length. Company officials want to shift the burden of vector work from the software to the hardware, with a scheduler that is designed to ensure the calculations run on the best available hardware. The technology enables the systems-on-a-chip (SoCs) to process large amounts of data simultaneously, a key requirement for an increasing number of workloads that run on supercomputers.
"Immense amounts of data are being collected today in areas such as meteorology, geology, astronomy, quantum physics, fluid dynamics and pharmaceutical research," Nigel Stephens, lead ISA (instruction set architecture) architect and ARM Fellow, wrote in a post on the company blog. "Exascale computing (the execution of a billion billion floating point operations, or exaFLOPs, per second) is the target that many HPC systems aspire to over the next 5-10 years. In addition, advances in data analytics and areas such as computer vision and machine learning are already increasing the demands for increased parallelization of program execution today and into the future."
ARM's SVE aims to address that growing demand for parallelism. It's designed to enable CPU designers to choose the vector length that best addresses their needs, Stephens wrote. It also supports what he called vector length-agnostic programming, which allows designers to hand-code their program for SVE once, and then "run it at different implementation performance points, while avoiding the need to recompile or rewrite it when longer vectors appear in the future. This reduces deployment costs over the lifetime of the architecture; a program just works and executes wider and faster."
The new ARM architecture featuring the SVE already is being used. Fujitsu is designing an ARM-based chip that will be used to power the next generation of its K supercomputer—being referred to as Post-K—which will be an exascale system scheduled to be operational in 2020 at the Riken Advanced Institute for Computational Science in Japan.
Fujitsu chose the ARM architecture to replace its own SPARC64 chips that have powered the K computer (pictured), which at one time was the fastest system in the world and now stands at No. 5. The Post-K system is expected to have 100 times the capacity and 50 times the performance.
With the new architecture and SVE technology, ARM is looking to muscle into a part of the industry that includes such powerful competitors as Intel, IBM and Nvidia, and also is attracting other chip makers. The world's fastest system, the massive Sunway TaihuLight in China, is powered by 40,960 Sunway SW26010 chips and holds more than 10.6 million cores.
The push into the HPC space is part of the larger server strategy for ARM, which is in the process of being bought by Softbank for $32 billion. The company initially is targeting cloud environments and HPC as it looks to push into the server space, Lakshmi Mandyam, director of server systems and ecosystems at ARM, told eWEEK. Vendors in the HPC space are increasingly comfortable with the idea of using accelerators in their systems, and are embracing the use of open-source software.
"A lot of platforms are based on Linux and open-source," Mandyam said.