Intel Begins Sampling Stratix 10 FPGA Accelerators
Officials with the chip maker say the new FPGAs will deliver twice the performance and five times the density of the previous generation.Intel has begun sampling its Stratix 10 programmable chips, which the company expects to use as accelerators in data center environments running compute- and data-intensive applications. In a blog post Oct. 4, Dan McNamara, corporate vice president and general manager of Intel's Programmable Solutions Group, wrote that company engineers were able to combine the chip maker's 14-nanometer tri-gate manufacturing process with its HyperFlex fabric architecture to develop a field-programmable gate array (FPGA) that will address the growing demands from end users for more performance and power efficiency as they try to manage the proliferation of smart, connected devices and the huge amounts of data they're producing. Intel is aiming the Stratix 10 FGPAs at such workloads as data center applications, cloud computing, radar and imaging systems, and network infrastructure, McNamara wrote. "We live in a smart and connected world where billions of devices are creating massive amounts of data that must be collected, rapidly processed and analyzed, and available from anywhere," he wrote, adding that Intel and the Stratix 10 will enable "service providers, data centers, cloud computing and storage systems to satisfy their insatiable demand for higher computational capabilities, lower latency, greater system flexibility and increased power efficiencies."
With Stratix 10, Intel is delivering twice the performance and more than five times the density when compared to the previous generation of FPGAs, and up to 70 percent lower power than Stratix V FPGAs while providing equivalent performance. There also is up to 10 teraflops of single-precision floating point performance, up to 1TB memory bandwidth that includes integrated High-Bandwidth Memory, and an embedded quad-core 64-bit ARM Cortex-A53 chip.