64-Bit CPUs: What You Need to Know - Page 9

It would be tedious in the extreme to even summarize the entire IA-64 instruction set; you can refer here for the complete ISA (Instruction Set Architecture) listing. But there are some highlights in the ISA worth noting, such as conditional (predicated) execution, hinted and speculative loads, and the odd way in which Itanium handles integer math.

Pretty much any IA-64 instruction can be conditional, with its execution predicated on literally anything you care to define. Far beyond the simple Z (zero), V (overflow), S (sign), and N (negative) flags of our childhood, IA-64 has 64 free-form predicate bits, each considered a separate predicate register. You can set or clear a predicate bit any way you like, and its condition sticks indefinitely. Any subsequent instruction anywhere in the program can check that bit (or multiple bits) and behave accordingly. This allows you, for example, to evaluate two numbers in one part of a program, but not make a decision (conditional branch) until much later. The microprocessor cognoscenti consider predicate bits more elegant than flags; they scale more easily to larger sizes (more bits) and are easier for compilers to target. Well cover predication in more detail below.