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    Rambus to Demo Threaded Memory Module at IDF

    By
    JEFF BURT
    -
    September 17, 2009
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      Rambus officials are continuing their push to develop new memory technologies that address the demands coming from multicore computing and virtualized environments.

      Rambus and memory product maker Kingston Technology announced Sept. 17 that they had developed a prototype DDR3 memory module that increases performance and lowers power in accessing main memory.

      The companies will demo the threaded memory module at the Intel Developer Forum in San Francisco Sept. 22-24.

      “Module threading is a way to increase throughput and reduce power consumption,” Michael Ching, director of marketing at Rambus, said in an interview.

      Ching said that as chip makers such as Intel and Advanced Micro Devices began to grow the number of processing cores on their chips, it quickly became apparent to Rambus officials that there was greater demand for memory bandwidth. The move from single-core to dual-core processors was an easy progression, he said.

      “At quad-core, we’re beginning to see the tip of the problem, with four cores trying to” gain access to memory resources, Ching said.

      That problem will only grow, with both AMD and Intel already launching six-core processors, and Intel on the verge of rolling out an eight-core Xeon chip. AMD is promising a 12-core Opteron next year.

      The collaboration of Rambus and Kingston is resulting in a “memory solution that helps overcome a major challenge with multicore computing,” Ramon Co, vice president of worldwide test engineering at Kingston, said in a statement.

      It was the anticipated growth of processing cores, as well as other memory-intensive workloads as virtualization, that convinced Rambus officials in May to launch an initiative to start looking at what main memory technologies will be needed after DDR3.

      The threaded memory module is part of that effort. Using standard DDR3 devices and traditional modules, Rambus and Kingston essentially are breaking up the DIMM (dual in-line memory module) into two independent parts that can be access simultaneously.

      Bandwidth is increased by enabling the processor to run more transactions in parallel, and power consumption is reduced because threaded memory modules are activated half as often as conventional modules, Ching said. Rambus officials said that according to initial tests of the module, throughput can be increased by as much as 50 percent while power consumption can be cut by 20 percent when compared with current DDR3 modules.

      Ching said marketing of the threaded memory module is a ways off, probably not until late 2011 or 2012, after DDR3 has run its course.

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