ARM Takes Aim at Supercomputing Space
The chip-making company has introduced a new ARMv8-A microprocessor design that will incorporate vector processing extensions for handling HPC workloads.ARM is making a strong push into the supercomputing space as the industry continues its march toward exascale computing. Officials with the company, whose chip designs can be found in most smartphones and tablets and are working to make their way into enterprise servers, provided more information on a new chip design that includes vector processing capabilities, which will enable the chips to better process many of the workloads being run in high-performance computing (HPC) environments today. ARM engineers detailed the company's Scalable Vector Extension (SVE) technology Aug. 22 at the Hot Chips 2016 show in Cupertino, California. The new design will be based on the company's 64-bit ARMv8-A architecture and will enable chip makers to leverage the SVE technology to bring vector processing to their ARM-based chips. The SVC allows for flexibility, with scalable vectors lengths ranging from 128 bits to 2,048 bits in length. Company officials want to shift the burden of vector work from the software to the hardware, with a scheduler that is designed to ensure the calculations run on the best available hardware. The technology enables the systems-on-a-chip (SoCs) to process large amounts of data simultaneously, a key requirement for an increasing number of workloads that run on supercomputers.
"Immense amounts of data are being collected today in areas such as meteorology, geology, astronomy, quantum physics, fluid dynamics and pharmaceutical research," Nigel Stephens, lead ISA (instruction set architecture) architect and ARM Fellow, wrote in a post on the company blog. "Exascale computing (the execution of a billion billion floating point operations, or exaFLOPs, per second) is the target that many HPC systems aspire to over the next 5-10 years. In addition, advances in data analytics and areas such as computer vision and machine learning are already increasing the demands for increased parallelization of program execution today and into the future."