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    Intel’s -Jasper Forest’ Processor Based on Nehalem Architecture

    By
    Michelle Maisto
    -
    April 8, 2009
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      Intel disclosed the first details of a new microprocessor, codenamed “Jasper Forest,” which is geared at further penetrating both the embedded market and the storage applications space.

      The Jasper Forest chip, which Intel introduced at the Intel Developer Forum in Beijing April 8, is based on the Nehalem-EP (efficient performance) microarchitecture. In addition to announcing Jasper Forest, Intel also detailed Moorestown, the next generation of the Intel Atom-based MID platform, as well as two new Atom chips.
      Frank Schapfel, a product line manager with Intel, explained to eWEEK that Jasper Forest integrates the PCI Express Bus – which is external on the Intel 5520 chipset – with the Nehalem Intel Xeon processor series. “This affords system-level power savings when you go from three chips … to two chips.”

      With Jasper Forest, the input/output hub has been integrated onto the chip, which Schapfel says offers the ability to bring Xeon performance into a smaller board space and to reduce heat.”

      Intel recognizes the unique market requirements of the embedded and storage markets, said Schapfel, and with Jasper Forest it “sought to build more well-suited Xeon processors to fit into smaller spaces and cooler systems.”

      During his keynote at IDF, Pat Gelsinger, vice president and general manager for Intel’s Digital Enterprise Group, discussed a range of Atom processor solutions for embedded computers, including in-vehicle information and entertainment, and industrial automation.

      Gelsinger additionally addressed “Larrabee,” Intel’s many-core architecture, designed for high-throughput applications. This chip, which is based on Intel’s x86 architecture, is also expected to make Intel more competitive in the graphics market, where it trails Nvidia when it comes to graphics technology.

      Larrabee, Gelsinger said, offers developers greater freedom with a programmable graphics pipeline. Gelsinger also discussed a C++ Larrabee prototype library that’s available, and an upcoming programming solution based on “Ct” technology.

      The first Larrabee products are due out in late 2009 or early 2010.

      Finally, Gelsinger said that Intel plans to offer new chips based on the Nehalem architecture for mainstream desktops and laptops in the coming weeks. Right now, Intel offers Nehalem-based chips – the Core i7 – for high-end desktops and workstations.
      In addition to standard processors, he said that Intel will also shrink its Nehalem-based chips from the current 45-nanometer manufacturing process to the smaller 32-nm, which will then allow Intel to integrate graphics technology onto the silicon.
      The first of Intel’s 32-nm chips, dubbed “Westmere,” are scheduled for release late this year and into 2010. Gelsinger also noted that Nehalem-based chips for multisocket server systems are scheduled for release in the second half of 2009. These processors will have up to eight processing cores within the silicon die.

      Editor’s Note: This story has been edited to include additional details.

      Avatar
      Michelle Maisto
      Michelle Maisto has been covering the enterprise mobility space for a decade, beginning with Knowledge Management, Field Force Automation and eCRM, and most recently as the editor-in-chief of Mobile Enterprise magazine. She earned an MFA in nonfiction writing from Columbia University, and in her spare time obsesses about food. Her first book, The Gastronomy of Marriage, if forthcoming from Random House in September 2009.

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