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    IBM, NEC Partner on 32-nm Chip Development

    Written by

    Scott Ferguson
    Published September 11, 2008
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      NEC is joining a contingent of other semiconductor companies that IBM has assembled that are developing new methods of manufacturing processors at 32-nanometers.

      On Sept. 11, NEC announced that it would join IBM and six other semiconductor companies to develop these 32-nm chips. The other partners in the alliance include Charted Semiconductor, Freescale, Infineon Technologies, Samsung, STMicroelectronics and Toshiba. The College of Nanoscale Science and Engineering at the University of Albany in New York is also participating.

      This alliance that IBM has assembled is looking to create chips that use standard, bulk CMOS (complementary metal oxide semiconductor) technology in the manufacturing process. These 32-nm CMOS chips should offer a 35 percent increase in performance compared with 45-nm processors, and can reduce power consumption by as much as 50 percent compared with 45-nm chips working within the same thermal envelope, according to IBM.

      These two aspects of 32-nm chip manufacturing technology are important as companies look to create a range of devices, from server systems to mobile devices and laptops, that use less power while increasing the performance.

      In 2007, IBM engineers already announced that the partnership had developed a high-k metal gate technology for 32-nm processors-a nanometer is one billionth of a meter-which should reduce power leaking from the chips’ transistors while increasing overall performance. So far, IBM has not detailed the specifics behind its high-k metal gate technology, but Intel has detailed that it uses the element Hafnium in its high-k metal gate technology used with its line of 45-nm processors.

      Intel is also moving toward a 32-nm manufacturing process. The first of these chips built on this process will appear in the later half of 2009. IBM has not set a specific date for when it plans to bring 32-nm processors into the mainstream market.

      NEC is already co-developing 45- and 32-nm CMOS processor technology with Toshiba. Now, the company plans to bring some of that know-how to the IBM alliance to develop 32-nm and even smaller processor nodes. The agreement also allows NEC and IBM to develop system-on-a-chip technology.

      The bulk of the research and manufacturing will be conducted at IBM’s 300 millimeter facility in East Fishkill, N.Y.

      In addition to this alliance, IBM and another set of partners, which includes Advanced Micro Devices, Freescale, STMicroelectronics, Toshiba and the College of Nanoscale Science and Engineering of the University of Albany, are working on developing 22-nm chip technology. In August, this group announced that it had developed a method for developing SRAM memory cells on a 22-nm manufacturing processes.

      Scott Ferguson
      Scott Ferguson

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