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Apple Computer Inc.s latest professional desktops have sparked a heated debate in the Mac community. At the center of the controversy: Are the dual Motorola PowerPC G4 processors within each Power Mac able to draw on the architectural enhancements being touted by Apple?
Among a raft of other architectural enhancements, the new Power Macs, announced last week in dual 867MHz, 1GHz and 1.25GHz configurations, are the first to include DDR memory. Apples Web site says that this change boosts throughput between memory and the system controller to 2.7GB/sec, increasing “total system performance.”
Bare Feats, a Web site that speed-tests Apple hardware, pitted the new dual 1GHz model against the companys previous top-of-the-line offering, an SDRAM-based dual-1GHz system that Apple unveiled in January.
Rob Art Morgan, proprietor of Bare Feats, concluded that the new DDR Power Mac has no apparent performance advantage. Morgan told eWEEK that the tests he ran take advantage of the CPU, memory and other system components in varying degrees, depicting typical consumer and professional use.
Bare Feats also posted a variety of theories on where the bottleneck exists. The most plausible explanation, Morgan says, is that the two G4 processors share a 1.3GB/sec connection to the system controller, and that if the new Power Macs were to use Motorolas latest 7470 version of the G4 instead of the 7455 that shipped in the earlier SDRAM generation of Power Macs, the full advantages of DDR memory could be realized.
Cupertino, Calif.-based Apple declined to specify the generation of processor in the 867MHz and 1GHz systems, shipping now, or the 1.25GHz model, which is due to arrive in September.
One longtime Apple developer told eWEEK he agrees with Bare Feats conclusions. “The fact remains that the G4s share a 1.3GB/sec connection to the system controller, so any theoretical boost to 2.7GB/sec bandwidth is mostly theoretical,” he said. “Their latest line of rather deceptive marketing has just kind of pushed me over the top.”
He also noted that typical PC chip sets use a number of independent buses for each CPU, to maintain high bandwidth. “In addition,” he said, “heavily integrated chip sets from SiS and Nvidia have separate connects for each subsystem, so theyre not all fighting for the same bandwidth.”
Apples Response
Apples Response
Apple questioned the CPU focus of the tests and said that critics need to look at the overall performance enhancements to the new systems, including its faster system bus (167MHz, compared with 133MHz in earlier models); twin ATA hard-drive controllers, one ATA/100 and one ATA/66; its direct PCI bus; and the ATI Radeon 9000 Pro graphics card included in the high-end models.
Tom Boger, Apple director of Power Mac product marketing, pointed out that in the Bare Feats benchmarks, the DDR model includes 1GB of L3 cache, compared with 2GB in the SDRAM model. He also said that the tests place most of the stress on the CPU, not the performance of the system as a whole: “Theyre spending most of their time in the processor(s),” he said. “Since the systems are running at the same clock speed, its not too surprising there isnt more of a gap.”
In addition, Boger said, the Bare Feats benchmarks dont reflect the DDR Macs potential performance increases in bandwidth for direct memory access, which lets system elements send and receive data directly from main memory without going through the CPUs.
Boger said the new systems represent a better price/performance ratio than the January model ($2,499 vs. $2,999) and urged users to look to the 1.25GHz Power Mac before drawing conclusions about how far the platform has advanced, speedwise, in the intervening months. “For a real comparison, theyll have to wait until the dual-1.25 comes out,” he said.
Dennis De Mars, a Mac OS X shareware developer from Fractal Domains, also contests Bare Feats claims. De Mars said that most of the tests are CPU-intensive, and that improvements in bandwidth from DDR memory to CPU wouldnt necessarily improve these benchmarks dramatically.
“For these tasks, much more time is spent in CPU processing than in reading or writing memory,” he says. “That isnt to say that the DDR implementation Apple is using isnt advantageous in general system usage, it is just to say that these benchmarks will not reveal those advantages.”
De Mars also notes that independent of the Power Macs DDR improvements, the new machines have a 25 percent faster system bus. The faster bus didnt demonstrate any improvements in Bare Feats tests, which he sees as proof that the tests arent measuring effective RAM bandwidth.
Nick dePlume is the editor in chief of Think Secret.