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    Data Bandwidth: Memory Should Take Pride of Place

    By
    Peter Coffee
    -
    October 28, 2002
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      What looks like an insurmountable problem may just be a well-disguised assumption. The problem of data bandwidth across the border of a microprocessor chip may just be a symptom of the assumption—that the so-called central processor has to be at the center of the machine, with memory as a peripheral. What would happen if memory took “pride of place,” with processing power arrayed around its edges?

      Micron Technology Inc.s Yukon device, soon to cross the line from concept to prototype, answers this question—not with a replacement for the CPU but with an additional system resource of distributed processing power that can take full advantage of the 200G-bps bandwidth inside a synchronous dynamic RAM chip.

      In applications such as image processing and data mining, a relatively small number of operations are executed against a huge volume of data. Simple processing elements, placed as close as possible to the data, can receive their instructions from a more general-purpose device and then turn their power loose without constantly fighting cross-chip bottlenecks.

      At 200MHz, the Yukon prototype should deliver peak processing rates exceeding 50 billion eight-bit operations per second or sustained processing rates of more than 200 million double-precision floating-point operations per second, according to the Microprocessor Forum presentation by Microns Graham Hirsch, chief architect of the companys Active Memory Program.

      “Memory is not the problem,” said Hirsch, at the forum in San Jose, Calif. “The bus is the problem. Picking up data, moving it and putting it down is the problem. The bandwidth inside a memory chip is very large. There should be some way of using that.”

      Related Stories:

      • CPU Power Push
      • Intel Banks on Banias Mobile Chips
      • Chips Power Killer Apps for Handhelds
      Peter Coffee
      Peter Coffee is Director of Platform Research at salesforce.com, where he serves as a liaison with the developer community to define the opportunity and clarify developers' technical requirements on the company's evolving Apex Platform. Peter previously spent 18 years with eWEEK (formerly PC Week), the national news magazine of enterprise technology practice, where he reviewed software development tools and methods and wrote regular columns on emerging technologies and professional community issues.Before he began writing full-time in 1989, Peter spent eleven years in technical and management positions at Exxon and The Aerospace Corporation, including management of the latter company's first desktop computing planning team and applied research in applications of artificial intelligence techniques. He holds an engineering degree from MIT and an MBA from Pepperdine University, he has held teaching appointments in computer science, business analytics and information systems management at Pepperdine, UCLA, and Chapman College.
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