EZchip Semiconductor, leveraging the technology it inherited when it bought Tilera last fall, is planning to put 100 ARM-based 64-bit cores into a processor aimed at a rapidly evolving networking market.
EZchip officials will give details about the upcoming Tile-Mx chips Feb. 25 at the Linley Data Center Conference in San Jose, Calif. The multi-core processors were first discussed earlier in the month during a conference call to talk about the latest quarterly numbers. The chips are in development, but won’t be sampling until the second half of 2016.
However, company officials said the chips high core count, mesh connectivity and hardware accelerators will address the demands on data center and carrier networks brought on by such trends as mobility, big data, social media, the Internet of things (IoT) and the cloud. They also will dovetail with new technologies like software-defined networking (SDN) and network-functions virtualization (NFV) and the trend in networking toward open switches and white boxes.
“The Tile-Mx is well underway, with a target of providing the highest core count at the lowest power, and the highest level of integration and performance through the inclusion of EZchip’s market-proven technologies and accelerating network and packet processing,” CEO Eli Fruchter said during a Feb. 11 conference call to discuss quarterly earnings, according to a transcript on Seeking Alpha. “We will provide a multicore CPU that is tailored for networking, and we believe that with the number of cores plus the EZchip network accelerators, we’ll be able to provide the multicore with the highest performance.”
The Tile-Mx chip family will represent EZchip’s initial effort with the ARM architecture, moving away from the proprietary designs Tilera used in building out its multi-core portfolio. It also will broaden the semiconductor company’s potential customer base. EZchip’s merchant network processing unit (NPU) business, formed in 2003, works with established networking vendors like Cisco Systems, Juniper Networks and ZTE.
With Tile-Mx—which will be based on up to 100 ARM Cortex-A53 cores—EZchip will be able to branch out into the growing market of white-box networking vendors, servers that run high-performance networking applications and software vendors. EZchip officials see a broad range of use cases for networking applications—such as load balancing, security, network monitoring, intrusion detection and prevention, video processing and application recognition—in SDN and NFV environments.
The new chip family also will include smaller versions of the chip armed with 36 and 64 ARM cores, officials said.
Along with the ARM cores, the new chips also will include a mesh core interconnect architecture to provide a lot of bandwidth, low latency and high linear scalability. In addition, the chips will leverage EZchip’s hardware-based accelerators—such as a traffic manager—an optimized memory architecture and an array of interfaces for Gigabit Ethernet, 10GbE, 25GbE, 40GbE, 50GbE and 100GbE and for PCI-Express.
The chips will offer 200G-bit throughput and will be able to take advantage of the growing ARM ecosystem of open-source software vendors, officials said.
EZchip joins a growing list of vendors leveraging the ARM architecture to challenge Intel’s dominance in the data center. Cavium, Applied Micro, Broadcom, Qualcomm and Advanced Micro Devices are among the chip makers that have introduced or are expected to unveil systems-on-a-chip (SoCs) to take on Intel not only in servers but also storage and networking appliances, where Intel also is looking to grow is presence.