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IBM is looking for more ways to bring its microprocessor technology to a larger audience.
At the Design Automation Conference in San Diego June 5, Big Blue is announcing that it will offer once proprietary chip technology to a much larger audience, which will have new implications for enterprise customers and consumers.
Much of the developments IBM will highlight at the show involve how the companys engineers will bring denser DRAM (dynamic memory) capabilities to its chips, which will improve latency and performance while using less power than conventional microprocessors.
This chip technology can be used to developed both high-intensity server systems for communications companies and a wide range of consumer products, such as cell phones and other handheld devices, said Bernard Meyerson, an IBM fellow and vice president of strategic alliances at the Armonk, N.Y., company.
The first chip developed with these technologies is IBMs Cu-45 High Performance (Cu-45HP) ASIC processor, which IBM developed using its SOI (Silicon-on-Insulator) technology.
These ASICs—specially designed semiconductors manufactured for one specific application, such as cell phones—will use IBMs eDRAM (embedded dynamic RAM) technology that engineers introduced at the International Solid State Circuits Conference in February.
Unlike SRAM (static RAM), IBMs eDRAM technology is much denser, which means the chips are capable of holding much more memory than currently possible. With the eDRAM technology, the random cycle time for this new chip will be 2 nanoseconds, while the latency will be 1.5 nanoseconds.
IBM was able to develop the eDRAM technology by changing the fundamental architecture of the chip at the silicon level, including new ways for the transistor to read and write memory.
Traditionally, IBM has used its SOI technology only with enterprise offerings, such as in the development of its Power Architecture. What IBM is doing here, said Meyerson, is similar to when the company opened up its proprietary technology to develop chips for other consumer devices, such the worlds three leading game consoles.
“The fundamental takeaway from all of this is that we are opening up our SOI technology to a much broader audience,” Meyerson said. “What we are offering is something very unique, and we want people to know that when they walk into a home and stare at a console that they know this technology is there. … Its a fundamental change in strategy and something that we feel is the natural evolution in the market place.”
IBM, in announcing that it will design and develop these Cu-45HP chips, said the technology will not be available until early 2008, which coincides with the companys plans to unveil a line of microprocessors manufactured on its own 45-nanometer process.
When it comes time to develop products based on this technology, IBM will either work with its partners to develop chips for specific products or simply develop processors that third-party vendors can use for their own devices.
While the Cu-45HP technology does have potential for use in lower-end consumer products, this ASIC chip will first appear in servers that support the infrastructure of communication enterprises and other companies.
In addition to the Cu-45HP ASIC, IBM also plans to detail three digital and analog design kits—the SiGe BiCMOS 5PAe, the CMOS 11LP and the SiGe BiCMOS 6WL—that can be used to develop new cell phones and other handheld devices.
All three design kits will be available by this summer.
In addition to its technology announcement, IBM and two of its partners—Charted Semiconductor and Samsung—announced June 4 that their Common Platform alliance will begin developing design kits and other technology for EDA (electronic design automation) and DFM (design-for-manufacturing) companies that want to use chips developed on the new 45-nm manufacturing process.
The alliance with IBM, Samsung, Charted and several other vendors was announced May 23.