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    Intel Demos Its Version of Future Supercomputing

    Written by

    Chris Preimesberger
    Published June 20, 2011
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      eWEEK content and product recommendations are editorially independent. We may make money when you click on links to our partners. Learn More.

      As mind-boggling as it seems, it’s only a matter of several years before enterprises will be dealing with exabyte-level data stores.

      That’s correct: storage of billions of billions of bytes in on-site disks and in the cloud. High-definition video and data cargo from scientific research projects, health care imaging, and oil and gas exploration data stores are leading the way here.

      Intel, ever the forward-looking IT pioneer, is committed to helping supply the processing power to handle all this new data and satisfy its shareholders at the same time. A year ago, it commissioned a division dedicated to MIC (Many Integrated Core) exascale supercomputing architecture. The so-designated “Knights Corner” processor, introduced in June 2010 and planned for the company’s upcoming 22-nanometer chip line, is the foundation for this initiative. It is expected to become available next year.

      On June 20 at the ISC (International Supercomputing Conference) in Hamburg, Germany, Intel outlined a plan to use Knights Corner and its MIC foundation to provide widespread exascale-type computing for parallel applications within nine years.

      Using the MIC architecture, Intel believes it can empower supercomputers-and eventually enterprise servers-to carry out as many as quintillions (a quintillion is 1,000 raised to the power of six, or a cardinal number 10^18) of computer operations per second. This is hundreds of times faster than current supercomputers can move.

      And today’s machines already move pretty darn fast.

      Processing Huge Quantities of Data

      The MIC architecture enables organizations to process huge quantities of data, which then can be used to investigate causes of (and solutions for) climate change, identify more efficient fossil fuels inside the Earth’s crust, and conduct human genome research, among others.

      Intel is currently shipping Intel MIC software-development platforms, internally called Knights Ferry, to selected development partners. This week at ISC, Intel and some of those partners-including Forschungszentrum Juelich, Leibniz Supercomputing Centre, Switzerland’s CERN and Korea Institute of Science and Technology Information-are showing early results of their work using the platform. The demonstrations showed how Intel MIC architecture delivers both high performance and software programmability.

      One of the major development advantages of Knights Corner is that the MIC already is a familiar programming environment for anyone who is used to working with Xeon x86. Intel has intentionally made these two environments cross over in nature.

      “If you can program Xeon, you can program a MIC microprocessor, because it uses the same tools, the same compilers and the same programming model that is used for x86 today,” Anthony Neal-Graves, vice president of Intel Architecture Group, told listeners on a conference call.

      “The programming model advantage of Intel’s MIC architecture enabled us to quickly scale our applications running on Intel Xeon processors to the Knights Ferry Software Development Platform,” said Professor Arndt Bode of the Leibniz Supercomputing Centre.

      “This workload was originally developed and optimized for Intel Xeon processors, but due to the familiarity of the programming model, we could optimize the code for the Intel MIC architecture within hours and also achieved over 650 GFLOPS of performance.”
      Energy Efficiency Also a Key Goal
      Intel, as well as its chief competitor, AMD, have been proactive in energy conservation. Intel recently demonstrated its cool-running 3D Tri-gate transistors last month, and Hewlett-Packard demonstrated equally cool-running AMD chips in its latest notebook computers — devices that emitted little no heat whatsoever after hours of operation.

      Intel is building energy efficiency into the MIC. The new Tri-gate transistors will make a big difference in this area.
      “This is really about delivering performance or flops within a manageable power budget, that’s the key issue that we’re facing in this space,” Neal-Graves said on the conference call.
      Neal-Graves said that Intel has partnered with European researchers to run three new labs dedicated to creating simulation applications that start to address the energy efficiency challenges of moving to exascale performance.

      Intel processor-powered supercomputers make up 77 percent of the latest TOP 500 list of supercomputers and nearly 90 percent of all new systems in 2011, according to researcher IDC.

      Chris Preimesberger
      Chris Preimesberger
      https://www.eweek.com/author/cpreimesberger/
      Chris J. Preimesberger is Editor Emeritus of eWEEK. In his 16 years and more than 5,000 articles at eWEEK, he distinguished himself in reporting and analysis of the business use of new-gen IT in a variety of sectors, including cloud computing, data center systems, storage, edge systems, security and others. In February 2017 and September 2018, Chris was named among the 250 most influential business journalists in the world (https://richtopia.com/inspirational-people/top-250-business-journalists/) by Richtopia, a UK research firm that used analytics to compile the ranking. He has won several national and regional awards for his work, including a 2011 Folio Award for a profile (https://www.eweek.com/cloud/marc-benioff-trend-seer-and-business-socialist/) of Salesforce founder/CEO Marc Benioff--the only time he has entered the competition. Previously, Chris was a founding editor of both IT Manager's Journal and DevX.com and was managing editor of Software Development magazine. He has been a stringer for the Associated Press since 1983 and resides in Silicon Valley.
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