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By the second half of this year, Intel plans on producing the first of its Penryn family of 45-nanometer processors and the company also plans to move ahead with its next-generation architecture in 2008.
On March 28, Intel executives delved into some additional details of its Penryn line of processors and also offered a glimpse at its Nehalem architecture, which the company said could offer up to eight cores per chip, as well as integrated graphics and memory controllers.
The Santa Clara, Calif., chip maker has 15 different 45-nanometer processors—which use the companys Hi-k processor technology—in various stages of design and will have two fabs dedicated to manufacturing these chips by years end. By the second half of 2008, Intel plans to have four fabs dedicated to 45-nanometer chip manufacturing.
Steve Kleynhans, an analyst at Gartner, said that in the past few years, Intel has been able to deliver on its promises of processor innovations, including reducing chips from 90-nanometer to 65-nanometer. This latest announcement will put additional pressure on its main rival, Advanced Micro Devices—as long as Intel can continue to deliver new processors on time.
“Its good for Intel as a company and it puts more pressure on AMD,” Kleynhans said. “For several years, Intel was at a disadvantage in the market and that allowed AMD to capture market share. Now, with Penryn, Intel looks like they are coming back strong and they seem intent to stay on top.”
Kleynhans said that Intels use of an integrated graphics core with its Nehalem processors not only demonstrates what the company is now technically capable of, but it is also a counterweight to AMDs plans for integrated graphics, which picked up steam after the ATI acquisition.
While Intel has offered details of its Penryn family of processors before, Patrick Gelsinger, the companys senior vice president and general manager of the Digital Enterprise Group, revealed some additional details to reporters on March 28.
In terms of clock speeds, the Penryn family will offer some desktop and server processors that run at 3.0GHz or faster. When Intel compared a Penryn processors with a 1600MHz FSB (front side bus) to a Xeon X5355 quad-core processor running at 2.66GHz and a FSB of 1333MHz, officials said the new chip offered 45 percent greater performance.
In terms of gaming performance, a Penryn chip running at more than 3.0GHz offered 20 percent performance improvement compared to a Core 2 Extreme with a 2.93GHz clock speed and a 1066MHz FSB.
The Penryn processors will also offer larger L2 cache. On a dual-core model, the chips will offer 6MB of cache, while users can expect up to 12MB of cache for quad-core processors.
In addition, Penryn processors will help speed up virtual machine transitions by 25 to 75 percent, according to the company. Intel is also offering a new technology called Deep Power Down, which will reduce the amount of power used during idle periods as well as reduce power leakage.
With the Nehalem architecture, Gelsinger and other Intel executives offered fewer details, but did reveal that these 45-nanometer chips, which will use the companys Hi-k silicon technology, will offer scalable performance with one to eight cores per chip and up to two threads per core.
The Nehalem chips will also offer scalable cache sizes.
By continuing to ramp up the size of cache, Intel is also looking to counter what AMD has done in terms of creating better on-chip memory, Kleynhans said.
AMD wasted little time in countering Intels announcement, claiming that its quad-core Opteron processor, dubbed “Barcelona,” will offer the superior microarchitecture and better performance.
While Intel launched its own quad-core models in November, AMD will roll out its quad-core chips later this year.
“Our competitors announcement today is further validation that their current architecture will not be competitive with Barcelona until they make [the] transition that we showed the industry in 2003 with Direct Connect Architecture,” said Randy Allen, vice president of AMDs Server and Workstation Business, in a statement.
“The dual-core performance leadership we have today is building a bridge to Barcelona and the increased performance it will deliver in a non-disruptive fashion.”
