P.A. Semi, a 150-employee chip startup, wants to make name for itself through attention to detail.
The Silicon Valley chip startup, run by chip legend Dan Dobberpuhl—Dobberpuhl, its CEO, presided over the development of the Alpha processor while at Digital Equipment Corp.—lifted its veil of secrecy Monday.
The company will begin offering a new family of low-power, multicore, PowerPC architecture processors in 2006.
The Santa Clara, Calif., company, which will present information on its chips for the first time publicly at this weeks Fall Processor Forum, went to great pains to limit the power consumption of its chips, while integrating a broad range of functions.
With its design, it believes it can compete with larger rivals IBM and Freescale Semiconductor Inc., carving a swath down the middle of the multibillion-dollar market for PowerPC chips.
Right now, IBM and Freescale make the majority of PowerPC chips, which are used in products ranging from big servers to networking gear.
“If you look at that whole [PowerPC] spectrum its very easy to see where we fit,” said Sanjay Iyer, P.A. Semis director of marketing. “Our product fits in between the high-end IBM products and the Freescale high-end products.”
P.A. will claim better power consumption than high-performance IBM chips such as the PowerPC 970MP, for example.
The startups PWRficient processor family, which start life with one chip but grow over time, could populate supercomputers—which are typically made up of nodes with processors, memory and other bit—servers, high-end printers, security appliances and other network gear as well as storage arrays, the company said.
P.A. Semi licensed IBMs PowerPC technology. But it designed its chips from the ground up to be miserly with power and to include all of the features necessary to build a device. The design practice is usually referred to as building an SOC or “system on a chip.”
The companys first product, a dual-core 2GHz processor, will consume about 13 watts of power in a typical setting.
If it were to be run flat out, it would consume as much as about 25 watts, said Mark Hayter, P.A.s chief system architect.
The chips are likely to be manufactured using a cutting-edge 65-nanometer process, which will aid in cutting their thirst and their size.
However, P.A. held down their power consumption more by design. By surveying potential customers, it found that power consumption and the real estate taken up by chips inside devices were top priorities.
Thus the company employed several tricks to lower power consumption and adopted the SOC methodology.
“There isnt a silver bullet to solve the power problem. You just have to have it as a priority all through the design process,” Hayter said. “Weve applied the methodology whereby if a part of the chip isnt being used, we wont clock it.”
The chips SOC approach helps address companies concerns about motherboard real estate, and at the same time helps cut system power consumption, by integrating memory and data input/output functions, he added.
Memory and I/O are often handled by separate chips. But putting them into the processor cuts down on the number of chips needed to design a given device.
P.A. Semis first processor, a chip dubbed PA6T-1682M, will include two 2GHz processor cores, a pair of DDR2 memory controllers, 2MB of Level 2 cache, and an I/O subsystem consisting of eight PCI Express controllers, two 10-gigabit Ethernet controllers, and four gigabit Ethernet controllers, the company said.
It will begin sampling the chip during third quarter of 2006.
P.A. Semi will follow up with a single-core processor in early 2007.
The single-core chip could be used in devices such as printers, network gear—which could range from network switches to all-inclusive home network security appliances with firewalls—and data storage equipment, the executives said.
The company plans to add a quad-core chip to the family in late 2007, following with an eight-core chip for 2008.
The executives declined to discuss its partners, including customers, and would not reveal who its chip manufacturing partner is—except to say it was not IBM—or elaborate on the chips size or pricing.