Advanced Micro Devices Inc. is exploring new types of onboard memory for its chips as a way to bump performance and squeeze more out of its manufacturing plants.
The Sunnyvale, Calif., chip maker has licensed memory technology called Z-RAM, created by startup Innovative Silicon Inc., of Santa Clara, Calif., in an effort to look at new ways of bumping up the cache or onboard memory of its processors. Z-RAM, which stands for zero-capacitance dynamic RAM, promises the ability to double the density of DRAM—used to store data—or quintuple that of static RAM—used for processor caches—without requiring special materials or extra manufacturing techniques when being fabricated, according to Innovative Silicon officials.
Although its still in the early stages of working with Z-RAM, AMD believes the technology could help it reduce the area that cache memory occupies inside its chips. Changing the sizes its caches take up could either allow it to reduce a chips overall area, referred to as its die size, or add more memory but keep its size the same. Because the wafers chip makers use to turn out chips are a finite size—most chip makers, including AMD, are now moving to 300MM diameter wafers—the smaller each chip is, the greater numbers it can be manufactured in. Thus smaller chips also cost less to make.
“The agreement is part of our ongoing research into higher density and more energy-efficient on-chip memory. Were looking at this for potential use in future AMD processors,” an AMD spokesperson said.
Although upping cache sizes is one way to bump up a processors overall performance, Z-RAMs greatest potential for use is in products that benefit from having large on-chip cache memories, the spokesperson said.
Thus AMDs Opteron processor line is likely the target of the research effort as server chips, which are often charged with crunching numbers or conducting online transactions, tend to benefit the most from large on-chip caches.
At the moment, AMDs top-of-the-line Opterons come with 2MB of Level 2 cache, which acts as a pool for holding data.
Processors also employ a smaller Level 1 cache, for temporarily storing instructions or data. The L2 cache therefore acts as a go-between for the L1 and main system memory. Thus increasing the size of the L2 cache helps increase performance as a chip is less likely to wait for data to be retrieved from main memory. Some chips add a Level 3 cache for data as well.
AMD has said it is aiming to roll out a quad-core-capable processor family during 2007 and then switch to an all-new processor architecture later this decade.
However, it has said little about those chips, such as what type of onboard memory they might have.
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