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    AMD Will Hammer Out 64-Bit Architecture

    By
    Francis Chu
    -
    March 12, 2002
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      At a recent meeting, AMD demonstrated its next-generation X86-64 “Hammer” processor technology in action. From what I saw at the demo, the Hammer architecture is impressive, although its still too early to say if the Hammer will do well in the market.

      The heart of AMDs Hammer architecture, which will debut in the ClawHammer and SledgeHammer chips that are expected to ship in the fourth quarter, is the new microprocessor core thats designed to support current 32-bit applications as well as the 64-bit apps of the future.

      The Hammer design also features new performance-enhancing components, including an integrated DDR (double data rate) memory controller and the HyperTransport system bus technology. The HyperTransport is a high-speed chip-to-chip interconnect designed to eliminate bottlenecks between the processors and the I/O subsystems. Scalable HyperTransport links allow the Hammer to support two-way, four-way or eight-way multiprocessing architectures. Each HyperTransport link runs at 6.4GB per second, and each Hammer processor can support up to three links for an aggregate bandwidth of 19.2GB per second.

      The Integrated Memory Controller increases the available memory bandwidth to the processor and reduces latency. The Hammer can house a single- or dual-channel DDR dynamic RAM controller.

      The ClawHammer is designed for single- or dual-processor workstations, while the SledgeHammer is targeted at four- to eight-way servers.

      Pin power

      The first thing I noticed when I picked up a prototype ClawHammer was its high pin count. The ClawHammer has 754 pins and the SledgeHammer has 940 pins, more than twice the total of the 462-pin Athlon. The higher pin count is needed for the Integrated Memory Controller and the HyperTransport components of the Hammer processors.

      AMDs live demo had two identical desktop systems with the AMD Solo motherboard and a single ClawHammer. One box was running Windows XP, showing the AMD processors compatibility with current 32-bit operating systems. The XP system was running scripts doing nonstop operations in Microsoft Excel and Word.

      Things got even more interesting on the second box, a 64-bit Linux system running two applications–a 32-bit version and a 64-bit version–side by side. The simple apps had a ball-like object ricocheting inside a window. I saw AMDs Hammer strategy in action, providing an architecture that supports native X86 32-bit applications with a migration path to 64-bit X86.

      AMD did not disclose the speed of the Claw Hammer, but to compete with high-power Intel designs, the ClawHammer should be at least comparable to the current Itanium, which runs at 800MHz, and the 1GHz McKinley, which Intel plans to release later this year.

      Technical Analyst Francis Chu can be reached at francis_chu@ziffdavis.com.

      Francis Chu
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