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Over three days at the International Solid-State Circuits Conference in San Francisco starting Feb. 23, Intel engineers will present five papers—with most focusing on technologies found within the chip makers 14nm processors. Mark Bohr, Intel Senior Fellow for logic technology development at Intel, will participate in a panel to talk about driving Moore’s Law down to 10nm and beyond.
Bohr noted the increasing costs involved in chip development, saying that reducing those costs is important if work on new generations of chips is to continue. However, he asserts that what Intel has accomplished in its development of the 14nm chips and what it can do over the next several years–10nm and 7nm processors—demonstrate that Moore’s Law still has legs.
Organizations aren’t properly patching their systems, according to the findings of Hewlett-Packard’s 2015 Cyber Risk report. Drawing on data collected across HP’s security teams in 2014, the study found that 44 percent of breaches could be attributed to unpatched vulnerabilities that were between 2 and 4 years old.
Initially, Lenovo claimed there was no security risk from Superfish adware that was bundled on some of its PCs between October and December 2014. But as it turns out, the risk is real and it extends beyond just Lenovo.
On Feb. 20, Lenovo changed its official position on Superfish and updated its statement admitting that, in fact, there are security risks to the adware technology that it bundled with its PCs. Lenovo has also issued a security advisory and labeled the Superfish adware as a vulnerability that has the potential impact of being exploited as a man-in-the-middle attack.
Officials with startup Flex Logix Technologies believe they have a developed a way of making a better field-programmable gate array (FPGA). These are chips that can be reprogrammed to run a wide array of applications, giving hardware and software makers greater flexibility in the workloads that run in these systems. Flex Logix officials believe they have found a way to enable chip makers to more effectively and cheaply reap the benefits of FPGAs in large part by putting the technology directly onto the chip rather than housing it as discrete silicon next to the chip.