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Intel Corp. plans to begin cutting the power consumption of its chips right at the factory.
The chip giant will on Tuesday unveil a plan to create an alternate version of its manufacturing process technology—the means by which it knits together the transistors that make up the circuits inside its chips—designed to yield more power-efficient processors and supporting chipsets for notebooks, handhelds and other battery-powered devices.
Intel, which at one time focused much of its efforts on building faster and faster processors—chips that inevitably also used more power—has taken a new path of late, announcing plans to deliver less power-hungry processors within all of its x86 product lines, including desktop, notebook and server chips, in 2006. By the end of the decade, the company has said it will deliver chips that use even less power for handheld devices. It intends the alternate manufacturing process to dovetail with the low-power chip design efforts.
The new process, which is based on P1264 or Intels 65-nanometer manufacturing technology thats due to come on line later this year, tweaks the way transistors—the tiny on/off switches inside its chips—as well as the wires that connect them, are formed. The changes, which include steps such as thinning the wires slightly and thickening the layers of material that insulate a part of the transistor known as the gate, help cut down on leakage or electricity that slips past after a transistor switches off, Intel representatives said.
Containing leakage, whose main effect on portable devices is to cut battery life, has become a more difficult endeavor over time as transistors have shrunk in size and been made to switch on and off more quickly as chip manufacturing technology has progressed and chip clock speeds have increased, chip experts say. Many companies continue to struggle with leakage, often using exotic materials or design tweaks in an effort to combat it.
For its part, Intel determined it could make relatively minor changes in its manufacturing process in order to help reduce leakage and thus help its product design teams create lower-power chips, said Mark Bohr, director for Intels process and architecture integration.
Still, the advent of the low-power chip manufacturing recipe, which Intel has dubbed P1265, marks a departure for the company. To date it has used a single manufacturing process to produce all of its leading-edge chips, ranging from PC processors for desktops and notebooks to flash memory chips for cellular phones. Although each chip was designed to meet its own specific set of requirements all have been manufactured with the same process technology.
Indeed, “Intel has normally developed [manufacturing process] technology just to serve the [PC market]. But now we are trying to serve a wider spectrum of product needs,” Bohr said. That means “we can get more competitive in product spaces where we werent before.”
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One Intel watcher called the creation of a new process technology unique.
“As long as weve been tracking Intel…its never called out a completely separate [manufacturing] process like this,” said Kevin Krewell, editor-in-chief of the Microprocessor Report.
“This divergence of the processes technologies, starting at 65-nanometer is an acknowledgement that standard logic process just isnt going to be optimized for battery powered devices. You have to trade off some performance for battery life.”
Paul Otellini, Intels CEO, showed off a concept for a small handheld computer he said could utilize ultra-low power Intel x86 processors at its Intel Developer Forum in September. Bohr indicated that the process would compliment low-power processor designs, including a including a project called LPIA or low power Intel architecture thats under way. However, P1265 is expected to be used mainly in products such as notebook chipsets at the outset.
The P1265 process, which Bohr said will enter into volume production in 2007, is far along in development by chip manufacturing standards. Intel has already created a fully functional SRAM (static random access memory) chip using it, a measure that Bohr said shows its viability. Intel traditionally uses SRAMs to test new manufacturing processes.
The low-power process, meanwhile, is similar enough to Intels standard 65-nanometer process that both can be used on the same production lines with the same chip manufacturing machines.
Instead of wholesale changes, which would force Intel to alter its manufacturing methods substantially—a time consuming and costly effort—the new process only changes a few steps of the manufacturing process. It essentially alters the recipe that the chip manufacturing tools follow in order to create each chip, Bohr said.
The P1264 process and its low power P1265 derivative “were both developed in the same fab” or chip making factory, he said. “They both use the same equipment set, and most of the process steps are identical.”
Thus, a P1267, which mirrors Intels 45-nanometer P1266 process could arrive as well, sometime after 2007.