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    Intel, Sun to Detail Chip Plans at ISSCC

    By
    Scott Ferguson
    -
    January 29, 2008
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      Intel is looking to offer details about its new microprocessors for portable Internet devices at the 2008 International Solid-State Circuits Conference in San Francisco, which starts Feb. 3.

      Since the beginning of the year, the Santa Clara, Calif., chip giant has not offered many specific details on its new line of processors, but the company does plan to describe a microprocessor at this year’s ISCC that has been “designed for mobile Internet devices.”

      While Intel does not use a specific name in the presentation materials, the company has previously said the name for this chip is Silverthorne, which has been created for mobile Internet Devices or MIDs.

      At the 2008 International CES, Intel CEO Paul Otellini talked in general about Silverthorne and announced that several vendors, including Lenovo and Asus, were building MIDs that use Silverthorne and the company’s new chip set for these devices.

      The annual ISSCC conference is a showcase for all of the major chip makers to talk about the latest advances in silicon and microprocessor technology. In addition to Intel, IBM and Advanced Micro Devices are also scheduled to make several presentations, according to information on the ISSCC Web site.

      In addition to these companies, Sun Microsystems plans to detail information about its third-generation SPARC chip, which will have 16 processing cores, 32 instructional threads and a clock speed of 2.3GHz. This chip will be “targeted for high-performance servers. It is optimized for both single and multithreaded applications,” according to the presentation brief on the ISSCC Web site.

      While Sun does not have a specific name attached to the “Third-Generation 16-Core 32-Thread CMT SPARC Processors,” the Santa Clara, Calif., company has said that its “Rock” processor will have 16-cores and use the company’s CMT (chip multithreading technology). Sun is currently testing the Rock processor.

      According to one of Intel’s presentations, the chip that appears to be Silverthorne is built on Intel architecture and uses the same 45-nanometer manufacturing process that the company has used to build the rest of its Penryn family of processors. The processor will also have a 512KB of L2 cache.

      The new chip will use less than two watts of power and is extremely small, specifically 25 millimeters square. Intel has previously said that the processor will use 10 times less power than current models. For example, the special processor Intel developed for the MacBook Air, which Apple announced earlier this month, uses about 20 watts.

      While Intel is planning to bring Silverthorne to market this year, the company is also developing a second, similar processor called Diamondville. This processor is geared toward low-cost laptops, such as Intel’s own Classmate PC.

      Intel is also planning additional presentations at the show.

      At one session, the company will delve into details about its new Itanium processor, code-named Tukwila, a quad-core processor that will support eight software threads simultaneously. According to the presentation, the chip is built on the older 65-nanometer manufacturing process and offers 30MB of cache, a peak memory bandwidth of 34GB per second and use of the company’s QuickPath Interconnect system architecture.

      At the 2007 ISSCC, Intel announced that it had developed an experimental 80-core microprocessor that could offer teraflops or trillions of calculations per second of performance while only consuming 62 watts of power.

      Scott Ferguson

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