eWEEK content and product recommendations are editorially independent. We may make money when you click on links to our partners. Learn More.
Talk about autonomous cars and the power of the IoT is expected to increase in intensity in 2019 as both enterprises and consumers watch the devices powered at the edge come alive. However, despite how many IoT devices are unleashed, their success hinges on one critical component: the speed of data processing.
There is a lot of conversation over computing architectures, and it is certain that in 2019 that discussion will continue–with RISC-V expected by many to be at the center of all this.
RISC-V (pronounced “risk-five”) is an open instruction-set computing architecture based on established reduced instruction set computing (RISC) principles. It is an open-source project available to anybody who wants to get involved. It represents a major step forward in data processing–speed that will be required of all the new and much “heavier” applications (such as machine learning, AI and high-res video) that will be coming into daily use.
RISC-V, with the addition of the soon-to-come 5G broadband wireless connectivity, is expected to become a major boost for all areas of IT during the next few years.
Processor and chipset maker Western Digital also is repositioning itself from being known as a data storage maker to simply a “data” company. Of course, it will always make devices that house data, but it is now focusing on producing new products, such as systems on chips (SOCs), custom chipsets, various software applications and other items. It has taken a position of leadership in the RISC-V community, having hosted a series of events that bring proponents of this new-gen hardware together.
Martin Fink, CTO at WD and a former longtime strategy planner and executive at Hewlett-Packard, along with Naveed Sherwani, president and CEO at SiFive, a RISC-V device maker, and Rick O’Connor, executive director of the RISC-V Foundation, recently shared with eWEEK what they see as the top industry trends for this year for the RISC-V community.
Data Point No. 1: In 2019, we will see a magnitude increase of RISC-V based silicon.
“As the IoT grows, the longevity and lifecycle of all connected “things” come into question. After all, workloads are constantly changing and processing demands are in flux. This year we will see a proliferation of RISC-V based silicon as there will be an increased demand from organizations who are looking to specifically tailor (and adapt) their IoT embedded devices to a specific workload, while reducing costs and security risks associated with silicon that is not open-source.” –Martin Fink
Data Point No. 2: This year will bring more design wins than any other ISA (combined between all vendors and open source).
“The number of RISC-V design starts that will occur in 2019 will outnumber the alternative ISA implementations. Considering the momentum behind RISC-V design ins in China, the Indian government pushing RISC-V and the rest of the globe’s interest will push RISC-V to be the most popular. SiFive will play a big role in this with our easy to design CoreDesigner web tool that allows anyone to design a RISC-V processor.” —Naveed Sherwani
Data Point No. 3: Five of the top 10 semiconductor companies will announce RISC-V plans in 2019.
“We have already seen large semiconductor vendors like Nvidia, Qualcomm and Western Digital announce RISC-V cores in their products. By the time the 2019 RISC-V Summit concludes, we will see other leading organizations announce their intent to use RISC-V in their products.” –Sherwani
Data Point No. 4: The new year will lead to better segment wise power performance and area than commercial alternative low end solutions.
“Several of the early RISC-V core and processor designs are showing smaller size and compelling performance when compared with other architectures. The smaller sizes lead to less power and the ability to run faster. As RISC-V solutions become more refined this trend should persist because of the smaller ISA.” –Sherwani
Data Point No. 5: More than 500 universities will start teaching RISC-V classes.
“RISC-V is already taught at many universities. In fact RISC-V is causing a resurgence in hardware processor design and hardware overall. The RISC-V foundation will help drive a large increase in universities using RISC-V in their curriculum.” –Sherwani
Data Point No. 6: The new year will lead to production volumes in the range of 10M to 100M cores.
“With the rapid global adoption of the RISC-V ISA, we are seeing increased availability of RISC-V cores. Over the course of 2019, we expect to see production volumes in the range of 10M to 100M cores and growing.” — Rick O’Connor