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    Why IBM’s Shrinking Transistors Look Like a Breakthrough for All of IT

    By
    CHRIS PREIMESBERGER
    -
    June 5, 2017
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      IBM.5nm.nanosheet

      Scientists have been saying with more frequency that Moore’s Law may be at, or at least near, its outer limits due to the limitations of physical science. Well, IBM begs to differ.

      As a refresher, Intel co-founder Gordon Moore’s 52-year-old law is the observation that the number of transistors in a densely integrated circuit doubles approximately every two years (the “law” originally was for one year; Moore amended it to two years in 1975). Even though there is only so much physical room inside a circuit, this “law” has been on target all along. And, thanks to a breakthrough from IBM Labs—announced June 5 at the VLSI Conference in Kyoto, Japan—it may be true for another 52 years.

      IBM, its Research Alliance partners GlobalFoundries and Samsung, and equipment suppliers have developed an industry-first process to build silicon nanosheet transistors that will enable the making of 5-nanometer chips. In short, to make smaller chips, you first need to make smaller transistors to put on those chips.

      Big Difference in Little 2nm Chip Size

      At the moment, the chip industry has the ability to produce 7nm processors, and 10nm chips are in common use today. But the difference in those two little nanometers—7nm to 5nm—can mean the world to the IT industry, especially when the burgeoning world of internet of things (IoT) devices starts going mainstream.

      The 7nm processor can hold up to 20 billion transistors; 5nm technology enables up to 30 billion switches on a single fingernail-sized chip. This breakthrough in transistor design ostensibly will enable processors to maintain the continuation of Moore’s Law toward ever-smaller, lower-power and more affordable iterations.

      “This is the first time we’ve built transistors for 5nm technology, and we know that transistor scaling has been extremely difficult,” Dr. Mukesh Khare, president of Semiconductor Research at IBM Research, told eWEEK. “But we continue to push the limits of current technology, with our alliance partners, to provide higher-density and better performance.

      “Two years ago, the IBM Alliance announced that we had built a 7nm test chip at our 300-millimeter research facility at IBM’s NanoTech Research Center [in Albany, N.Y.]. Now we come back two years later, with the first proof point of a new device structure. Ten-nanometer chips are in manufacturing, and you can buy product now; 7nm is now going through the volume manufacturing test process—and expect to begin high-volume manufacturing on 7nm by the end of 2018. Now we’ve come back two years later with transistors for 5nm processors.”

      Stacks of Silicon Nanosheets Were Part of the Secret Sauce

      IBM and its partners achieved the breakthrough by using stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology.

      FinFET, also known as Fin Field Effect Transistor, is a type of non-planar or “3D” transistor used in the design of modern processors. As in earlier, planar designs, it is built on an SOI (silicon on insulator) substrate.

      This is the first time that anybody has come up with a transistor structure for 5nm technology, Khare said. This structure is called a nanosheet, and Khare and his partners from the alliance demonstrated some of the aspects of this June 5 at the Kyoto conference.

      “By making the chips inside computers more powerful and more efficient, IBM and our partners will be able to produce the next generations of servers and storage systems for cloud computing, big data analytics and cognitive computing,” Khare said when the 7nm transistors came out, and the same holds true today with the 5nm transistors.

      IBM Research believes the latest transistor process can deliver 40 percent performance enhancement at fixed power, or 75 percent power savings at matched performance.

      Timing Couldn’t Be Better

      The timing of the 5nm breakthrough couldn’t be better, thanks to the huge number of new IoT devices in the transom. This isn’t to mention all the gazillions of chips that will be needed to power self-driving cars, servers, homes, drones, in-device artificial intelligence and 5G sensors and cameras that drive the dreams of every device maker in the world—and there are a lot of them.

      The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.

      What this will mean for the creation of new jobs, both domestic and foreign, is incalculable at this early stage, but it undoubtedly will be good.

      The timing of the announcement means that—based on the iteration, testing and manufacturing cycles of the recent past—we probably won’t be seeing 5nm processors in the market for three to five years, Khare said. But that still should work out to be in plenty of time to handle expected demand for the use cases noted above.

      This is all part of IBM’s $3 billion investment three years ago into new-generation IT technology research. We’re now beginning to see how it all may be paying off—for the company and for the world at large.

      Image courtesy of IBM Research

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