Page Two

By Jeffrey Burt  |  Posted 2003-06-10 Print this article Print

The result is that where devices now need multiple memory chips to meet these goals, in the future they would only need one MRAM chip, Gallagher said. Also, unlike electronic memory chips, the non-volatile MRAM chips can retain data even when power to the device is turned off. That means that PCs and other computers could boot up immediately—similar to turning on a light switch, Gallagher said—rather than having to wait for software to load up. That also will save power, since a device does not need a constant flow of power to keep the data intact.
At the event in Japan, IBM and Infineon officials unveiled a high-speed 128K-bit MRAM core built with a 0.18-micron process. Using this process, the two companies created an MRAM memory cell size of 1.4 square microns—about 20 million times smaller than an average pencil eraser top, according to IBM. Even at this size, the engineers were able to control memory reading and writing to the chip.
The writing capability is one of the key differentiators between MRAM and flash memory, which is used in mobile devices, Gallagher said. Information can be written to flash about 100,000 times before its capability begins to break down, he said. In contrast, MRAM theoretically could be written to without limitation. Gallagher said tests have shown that it can be written to at least 680 million times. Getting the memory onto the logic base was an important hurdle in the development of MRAM, he said. The work now will focus on pushing the technology toward commercialization, he said. IBM and Infineon have been working together on MRAM since creating a joint development program in November 2000.


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