eWEEK content and product recommendations are editorially independent. We may make money when you click on links to our partners. Learn More.
Intel Corp. said it has developed a method of stacking flash memory five dice high, as a way of increasing the memory found within cell phones and PDAs.
Intel has developed a technology called ultra-thin chip scale packaging, which will be used to develop 512-Mbit modules later this year, and 1-Gbit stacks by early next year. Intel also said it had shipped its 2 billionth flash-memory unit.
Cell phones, PDAs and networking equipment use flash memory to store programs and data, and, like in a PC, the demand for more storage is constantly increasing. A phone capable of handling data alone requires about 48 Mbits of memory, according to Scott Dunagan, flash products marketing manager for Intel; a phone with a color screen often contains 64 Mbits, and Java-enabled phones with a camera installed can require up to 256 Mbits. The problem is that those phones generally have to be thin enough to fit in a pocket.
And thin phones require thin chips, because the “floor space” on a mobiles printed circuit board isnt large enough to accommodate flash laid out side by side. Today, cell phone makers can tolerate up to 1.2mm in total z-height, but are asking for 1mm z-heights by the end of the year.
“If you want to be a supplier to cellular handsets, you have to have stacked technology,” Dunagan said.
Intel has traditionally stacked up to four dice in its chip scale packaging, which can also incorporate logic. Intels PXA262 embedded microprocessor stacks either one or two embedded flash chips on top of the logic dice, depending on the configuration.
Now, to allow more chips, Intel has “thinned” the flash dice, shaving minute layers from the substrate without harming the dies electrical performance. A typical flash die is 7 mils thick (an arcane measurement tool that translates to about 0.007 inches thick). Intel has shaved the “ultra-thin” dice down to just 0.003 inches thick, Dunagan said. Each chip shares physical traces on the motherboard with another in the stack.
The new packaging technology using Intels 1.8V Strataflash multi-cell flash technology will enter production in the third quarter, Intel said. Multi-cell flash technology increases the number of bits controlled by each memory cell, increasing the density and the data capacity of the chip.
Intel will ship more stacked flash memory than discrete flash, Dunagan said. The new design has also placed some constraints on the companys partners. Intel can include SRAM and programmable SRAM into the stack, but these are supplied by about five other companies, which must design their components to Intels specifications, including a tolerance for the “thinning” process.
Later, Intel will begin including flash memory in package-to-package stacking, which stacks several packaged chips on top of one another. The modular technology will be used to combine logic and memory chips into a single stack. The technology resembles a folded stick of gum with ball pads attached to one side, Dunagan said.