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    Intel Alters Itanium Road Map

    Written by

    Jeff Burt
    Published January 16, 2003
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      Intel Corp. is changing the road map for its 64-bit Itanium chip, adding in another Itanium 2 chip next year and putting dual-core processing technology into its Montecito processor, which initially was expected next year but now is due out in 2005.

      The Santa Clara, Calif., chip maker had intended to put the dual-core processing technology—which enables Intel to put two full processors onto the same piece of silicon and fit it into the same package, thereby essentially doubling the processing power—into chips after Montecito, according to Lisa Graff, director of enterprise processor marketing for Intel.

      In between this summers release of the next-generation Itanium 2 chip—code-named Madison—and Deerfield, a chip designed for ultradense blade servers, and the 2005 release of Montecito, Intel will release another Itanium 2, code-named Madison 9M, in 2004. That chip will be made through the same 0.13-micron manufacturing process as Madison. However, it will be released at a faster speed than Madisons 1.5GHz and will feature 9MB of Level 3 cache, rather than the 6MB in Madison. The result will be more data closer to the processor, resulting in improved performance, Graff said.

      “We saw that we had the opportunity to extend one of our processors [Itanium 2] and do even more with it the following year,” she said.

      Montecito will be built via a 0.09-micron manufacturing process that will shrink the die size and reduce Intels production costs per chip. Graff declined to give specifics about that chip.

      “With the 90-nanometer process, well be shrinking everything,” she said.

      Intel is hoping Madison will push Itanium into the larger enterprise systems. Already, some OEMs, such as Hewlett-Packard Co. with its forthcoming Intel-based Superdome server and SGI, have announced 64-way systems, and NEC Corp. is preparing a 32-way system based on Itanium 2. Currently, Itanium plays primarily in the four- to eight-way space, Graff said.

      The current Itanium 2 chip runs at 1GHz with 3MB of L3 cache. Madison is scheduled to come out at 1.5GHz. Deerfield, which will be released shortly after Madison, will feature the same architecture as Madison, but will be made with the 0.09-micron process, which will cut the chips energy consumption and heat generation, key attributes for blade server processors.

      Jeff Burt
      Jeff Burt
      Jeffrey Burt has been with eWEEK since 2000, covering an array of areas that includes servers, networking, PCs, processors, converged infrastructure, unified communications and the Internet of things.

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