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SAN JOSE, Calif.—Xilinx officials earlier this year introduced a concept they called an adaptive compute acceleration platform—or ACAP—that essentially brings together multiple compute acceleration technologies, integrated networking, leading edge memory, software development tools and frameworks to address such modern workloads as artificial intelligence, big data and 5G networking.
Officials with the FPGA (field-programmable gate array) vendor at the time said innovation in the industry was happening too quickly for compute processing technologies like CPUs from Intel and GPUs from Nvidia and Advanced Micro Devices to keep pace and called for a highly software programmable architecture that could quickly adapt to the changing needs. ACAP was the focus of what Xilinx engineers called its Everest project, an effort years in the making that cost more than $1 billion.
The company is now unveiling the first product lineup to come out of the project and a roadmap for four more series that will comprise what officials are calling Versal, a combination of the words “versatile” and “universal.” At the second Xilinx Developer Forum (XDF) here Oct. 2, executives said Versal is a new heterogeneous computing category that offers a broad range of architectures under the same umbrella and has at its foundation programmable hardware and software.
Versal comes at a time of immense change driven by such trends as AI and machine learning; the rapid growth of data and the need to collect, store and analyze it; mobility; and 5G networking that require an adaptive compute environment that can quickly address the changing dynamics in the industry.
“We clearly are in need of disruptive innovation,” Kirk Saban, senior director of product and technical marketing at Xilinx, said at a briefing of analysts and journalists the day before the official announcement. “We are in need of something that can be inherently software programmable from the ground up, built to be software programmable by design, by intent. That is the fundamental foundation of what is different about ACAP and anything else that Xilinx has ever built in its history.”
The industry for more than a decade has increasingly embraced accelerators—including GPUs and Xeon Phi co-processors from Intel—to improve the performance of systems without vastly scaling the power consumption. More recently, FPGAs—which unlike CPUs and GPUs can be programmed via software—also have been leveraged as accelerators. The top vendors have been Xilinx and Altera, which Intel bought for $16.7 billion in 2015.
In recent years, Xilinx has expanded its product capabilities, growing from FPGAs to various systems-on-a-chip (SoCs) and now to ACAP, an acceleration platform built on Taiwan Semiconductor Manufacturing’s 7-nanometer FinFET process. It includes scaler processing engines, adaptable hardware engines and intelligent engines. The scaler engines are based on Arm’s Cortex-A72 application processor and Cortex-R5 real-time processor architectures and include a platform management controller, and the adaptable hardware engines are designed for greater compute density, enabling custom memory hierarchy and fast on-the-fly reconfiguration.
The intelligent engines include a digital signal processor (DSP) engine for low-latency and high-precision floating point workloads and an AI engine for high throughput, low latency and power efficiency for AI inference and advanced signal processing.
There are integrated host interfaces like PCIe Gen4x16 and CCIX, scalable memory controllers including DDDR4-3200, LPDDR4-4266 and high-bandwidth memory (HBM), protocol engines, multiple transceivers, programmable I/O interfaces and a network-on-a-chip, which Saban called the “superhighway that interconnects all the technology on our platform.” For developers and data scientists, there are frameworks like TensorFlow, Caffe and Spark, tools, libraries, embedded run-times and middleware.
“The whole idea is to combine the best of the worlds of CPUs, ASICs such as GPUs and others, modems and FPGAs, all with the hardware logic you find in a hardware device, like the memory controller and things like that,” Karl Freund, senior analyst with Moor Insights and Strategy, told eWEEK. “Xilinx is saying, ‘We can give you all of these on a single device.’”
The Versal portfolio will include six families of products. The Prime, Premium and HBM series are aimed at improving the performance, connectivity, bandwidth and integration for a broad range of applications, while the AI Core, AI Edge and AI RF series include the AI Engine aimed at machine learning inference workloads. At XDF, the company debuted the first two series—Versal Prime for diverse workloads and AI Core, which officials said will offer eight times the performance in AI inference workloads as GPUs.
According to Saban, the Versal products are being used by several customers as part of an early access program. The Versal Prime and AI Core series will be generally available in the second half of 2019, with Prime including nine versions and AI Core five. The Premium and AI Edge series will roll out in the first half of 2020, followed by the AI RF series in the second half of that year and HBM later in 2021.
The massive growth in the amount of data being generated and the rapid expansion of AI and such subsets as machine learning and deep learning from the data center through the network and out to the endpoint are driving the need for a highly heterogeneous compute environment, he said.
“Moore’s Law is over,” Saban said. “The era of scaling and being able to roll out process technology and to be able to double performance in half the power every generation, those days are gone. As a result, some giants in the processor industry are struggling to keep pace with the innovation that’s out there today.”
Xilinx officials in the past have been content to run under the radar to some extent, building their products without much fanfare. Moor’s Freund said that with Versal, the company will have to become more vocal about its products, which it is not used to do doing. However, it’s something that is happening under President and CEO Victor Peng. At last year’s first XDF, Freund said he was the only analyst and that there were two journalists. At the briefing for Versal this year, there were more than 100 analysts and journalists in the room.
Xilinx officials also said it represented one of the few times in the company’s history that they publicly talked about a product roadmap.