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Imagination Technologies last year bought MIPS Technologies’ chip business with an eye toward the booming mobile device market, and now company officials are beginning to shed light on what will be the first products from that acquisition.
The company, best known for its graphics core technology that is found in a range of mobile chips, later this year will introduce the first 32- and 64-bit variants of the MIPS-based CPUs that officials hope will let Imagination compete against the likes of ARM and Intel in the lucrative smartphone and tablet spaces.
The MIPS Series5 “Warrior” chips, based on MIPS’ high-performance, low-power RISC architecture, will come with a number of features that include built-in support for hardware virtualization, integrated security capabilities, support for APIs for such languages as C or OpenCl, and MIPS’ hardware multi-threading technology for improved throughput, quality of service and power/performance efficiency.
Imagination will give device makers and users another CPU option that will complement what the company already offers and will exceed what already is being offered by other vendors, according to Imagination CEO Hossein Yassaie.
“The industry is longing for a choice in the CPU market, and we are making MIPS a clear and superior alternative,” Yassaie said in a statement. “We have an outstanding range of cores available today and that will be complemented by our forthcoming ‘Warrior’ cores, which will provide levels of performance, efficiency and functionality that go beyond other offerings in the market.”
The response from customers has been good, he said.
“With MIPS, we are creating a solution that a wide range of customers can benefit from and commit to for the long term, across applications, ranging from tiny embedded devices to 64-bit many-core products for networking and beyond,” Yassaie said. “We are confident that as we roll out the technologies on our MIPS road map, we will change the landscape for CPU IP.”
Imagination, which has a history of licensing its GPU designs, is wading into an increasingly competitive chip market for mobile devices and low-power systems. ARM is the clear leader in the mobile device space, with its low-power chip designs—which it licenses to the likes of Samsung, Qualcomm, Texas Instruments and Nvidia—found in the bulk of smartphones and tablets on the market, including the iPhone and iPad.
At the same time, Intel for the past few years has been driving down the power consumption in its Core and Atom platforms, and later this year will release Atom processors based on the new “Silvermont” architecture. Intel officials are confident that Silvermont-based Atom systems-on-a-chip (SoCs)—including the upcoming “Bay Trail” for tablets and “Merrifield” for smartphones—will help the company gain significant traction in the mobile device space.
“We’re breaking the myth that ARM can do things that Intel cannot,” Dadi Perlmutter, executive vice president, general manager of the Intel Architecture Group, and Intel’s chief product officer, said during a May Webcast to introduce Silvermont.
AMD also is pushing into the ultraportable device space—such as tablets, ultrathin PCs and hybrids—with new products such as the “Temash,” “Kabini” and “Richland” SoCs.
However, Imagination officials believe the acquisition of MIPS in November will give it the tools to compete. The company paid $60 million for the MIPS business and 82 of the patents to the MIPS architecture. (ARM was part of a consortium of tech companies that paid $350 million for 580 patents and patent applications in MIPS’ portfolio. ARM paid $167.5 million of that.)
Since then, Imagination has completed integrating the MIPS engineering team with its own, almost doubling the resources working on the MIPS CPU efforts. Imagination also is investing in areas around MIPS such as tools, compilers, debuggers, operating systems and software, officials said.
Along with giving some details on the MIPS Series5 Warrior CPUs, Imagination officials also said the company has updated its current portfolio of MIPS Aptiv cores.