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Ineda Systems officials are unveiling the company’s low-power chip architecture specifically designed for wearable devices and the Internet of things.
The company, based in India with a U.S. office in Palo Alto, Calif., on April 8 announced that it is developing its Dhanush family of what officials are calling wearable processing units, or WPUs, that initially will target wearable devices such as smart watches, smart headsets and fitness bands. The systems-on-a-chip (SoCs) will off up to 30 days of always-on battery life and will enable the devices to be updated as needed.
At the same time, Ineda closed a $17 million round of Series B funding, with chip- and device-makers Samsung and Qualcomm among the investors.
Ineda officials are hoping that the development of silicon aimed at the wearable device space will have the same effect as low-power SoCs had on the smartphone space.
“The smartphone market grew substantially with the advent of smartphone-specific dedicated application processors,” Ineda CEO Dasaradha Gude said in a statement. “WPU SoCs will enable a similar transformation in the wearable market segment. … The Dhanush family of WPUs offers better power consumption by an order of magnitude than smart phone processors that are currently being retrofitted for wearable devices.”
Industry analysts are expecting big things from wearable devices and the Internet of things (IoT). Analysts from Berg Insight are predicting that the shipments of such devices hit 8.3 million units in 2012 and will grow to 64 million units by 2017. IDC analysts are forecasting that revenues from technologies and services related to the IoT will grow from $4.8 trillion in 2012 to $7.3 trillion by 2017.
Tech vendors see huge growth opportunities in these markets. Intel, which has created a business unit dedicated to the IoT, last year launched a new family of small, energy-efficient SoCs called Quark that are made for wearable devices and the Internet of things. Intel also this year will release Edison, a small computing platform that device makers can leverage as they build wearables and other IoT systems. ARM, whose chip designs power the bulk of the smartphones and tablets on the market, also sees a wearables and the IoT as a good fit for its low-power architecture.
Imagination Technologies officials earlier this month pointed to a number of vendors that are leveraging MIPS-based CPUs and PowerVR graphics in their product designs for the wearable space. One of those companies mentioned was Ineda.
Ineda officials said the Dhanush family of WPUs will be powered by the company’s Hierarchical Computing architecture, which is designed to enable multiple CPUs to run independently or together, depending on the tasks or applications they are running. The architecture is designed to ensure that each task gets the optimal amount of power they need at the lowest power consumption, according to officials. Power efficiency is further enhanced by the resources—including the I/O, memory and display—that are shared by the compute cores.
Ineda will offer the Dhanush SoCs in four different categories, with Dhanush Advanced being the highest end. These SoCs will offer features needed for high-end wearable devices, such as rich graphic and user interfaces, and the ability to run such mobile device-class operating systems like Google’s Android. Dhanush Optima has the same capabilities, though it can’t run such mobile-class OSes. It’s aimed at midrange wearables.
Dhanush Micro is for low-end smartwatches that demand a larger compute and memory footprint, and also includes a sensor hub CPU subsystem that fuels the always-on functionality of the devices. Dhanush Nano is for the most simple wearable devices, offering a microcontroller-class compute and memory footprint.
Ineda currently is sampling the Dhanush chips with top-tier customers, and officials said volume production will come in the second half of the year. The company also is offering development kits for evaluation to select customers, and is creating reference designs, software-development kits and APIs that will enable OEMs and third-party programmers to take advantage of the Hierarchical Computing architecture, officials said.