Intel to Integrate PCI Express Into Chip Sets

SAN JOSE, Calif.—PCI Express, an emerging incumbent to the PCI standard used to connect computers to other computers and peripherals, will begin to find its way into Intel Corp. products, executives with the giant chip makers said here on Wednesday.

In his keynote speech at the Intel Developer Forum 2003, Mike Fister, senior vice president and general manager of Intels Enterprise Products Group, said PCI Express will be integrated into the new chip sets that will roll out in 2004.

That will include the chip set code-named Twin Castle for OEMs as well as the Lindenhurst chip set for dual-processor systems and Tumwater for workstations. Fister also said Intel next year will launch Lindenhurst-VS, for lower-cost servers.

Intel officials said PCI Express enhanced bandwidth will help as the industry starts cranking out faster chips and users demand more memory and better graphics capabilities.

In an interview following the keynote, Intel Chief Technology Officer Pat Gelsinger said the current architecture, PCI, is running out of headroom, and that PCI Express will begin to take over next year.

“In 05 there will just be an avalanche of products,” Gelsinger said.

Intel intends to integrate the new architecture throughout all of its offerings, from mobile products to the largest servers, officials said.

The new interconnect already is beginning to emerge, with some demonstrations from companies at the show to Neil Hand, director of worldwide marketing for Dell Inc.s Product Group, saying at Fisters keynote that all of the companys PowerEdge server products will incorporate PCI Express starting next year.

Unlike PCI, PCI Express is a serial link, enabling more data to move through fewer lines than the parallel delivery in PCI. Also, PCI Express links will run faster, at 2.5GHz as opposed to 133MHz.

Fister said PCI Express was only one of the ways Intel was enhancing its enterprise offerings.

“Companies need to run their businesses better, faster and cheaper,” he said.

To that end, Fister announced a blade server family of products, starting with the two-way Server Compute Blade SBXL52, powered by Xeon chips, and plans to launch a four-way system, code-named McCarran, later this year.

Management of the blades will come via Intels Management Module and Veritas Software Corp.s OpForce deployment software.

Fister also touched upon the Xeon road map, which includes the dual-dore Tulsa chip for multiple-chip systems after 2004, and Jayhawk, a dual-processor chip that will come out at a higher frequency than next years Nocona processor. Nocona will be release at more than 3.2GHz.

In addition, Fister said that Intanium-based systems will play an increasinlgy larger role in high-performance computing environments. He said that the number of Intel-based systems on the Top 500 list of supercomputers grew from two years ago to 119 last year.

Intel last week rolled out an Itanium chip optimized for dual-processor HPC systems. That chip will run at 1.4GHz but offer 1.5MB of L3 cache, compared with the 6MB in the “Madison” Itanium 2 6M chip.