Its not an easy time to be either Intel or AMD. The launch of puts the spotlight on the almost trivial difference between their strategies, but the companies are really just placing different bets in the same casino of complex and costly designs. Its a gaming hall that both of these chip makers were forced to enter by the relentless pressures of semiconductor fabrication progress.
Given the option, we wonder if both companies would rather just spend a quiet evening at home knitting memory chips and mobile processors. But that choice is not on the table, at least not at the margins that both companies need to support their present business models and future growth ambitions. Instead, both companies hope that the mass-market economics of high-volume processor production will draw resource-limited server manufacturers—and cost-conscious enterprise buyers—into their 64-bit game.
Server processing power is clearly a buyers market. Intel has been almost embarrassed by its own success in continuing to squeeze higher clock rates, if not proportional performance gains, from the aging Pentium architecture and its Xeon server-optimized configurations.
The question, though, is how much opportunity remains to analyze an ever-more-rapid flow of Pentium-style instructions, on the fly, in search of opportunities to transform them into entwined (but not entangled) streams of concurrent operations. Two different answers to that question define the difference between Itanium and Opteron as the next logical step for server CPUs.
Intel is betting that on-chip instruction-scheduling hardware, which emerged on x86 chips in the late 1990s to inject new life into 1980s code, is nearing its limit—that added cost, in terms of complexity of design and share of on-chip resources, will soon exceed increased contribution.
Each successive generation of Pentium processor has shown a smaller percentage increase in the number of instructions per clock cycle, with the Pentium 4 actually suffering a decline; thread-level parallelism, such as Intels Hyperthreading, offers perhaps another few tens of percentage points of performance gain, but this approach increases the workload at the edge of the chip where congestion is already a problem.
With Itanium, Intel proposes to examine programs when they are compiled into their executable form, and encode concurrent operations ahead of time. Intel calls this approach EPIC, for “explicitly parallel instruction computing,” and it is the genuine difference between Itanium and AMDs x86-64. EPICs drawback is that the core of the Itanium no longer offers an upward-compatible path to existing x86 code, being designed instead with the simpler logic and the huge array of on-chip data registers that are the optimal environment for Itanium-style instructions.
Upward x86 compatibility on Itanium processors is provided by included auxiliary hardware, but Itaniums actual speed with 32-bit x86 code has proved to be disappointing. Intel and its Itanium design partner, Hewlett-Packard, now position this facility as a convenience for running code that is either non-critical to performance or unavailable for porting to Itanium native form. Itaniums 32-bit x86 hiccup creates a major opportunity for AMD, which is betting that its cheaper to perform a miracle in hardware—and duplicate it in volume-produced microprocessors—than to undertake the worldwide drudgery of revamping the software base.
AMD is inviting enterprise IT buyers to set their own pace in a move to 64-bit systems at PC-market prices. The Opteron and its desktop-oriented sibling, the Athlon 64 (promised in September), throw all of AMDs talent at the challenge of running x86 instructions as quickly as possible—while at the same time introducing 64-bit hardware and instruction-set extensions.
There is, however, a large degree of self-fulfilling prophecy in AMDs situation: In this casino, the other players side bets change the odds at the center table. If industry infrastructure vendors and software developers expect AMD to do well, then IT buyers will soon see a host of optimized driver software, middleware and applications for x86-64 that could easily add tens of percentage points to the overall performance of Opteron and Athlon 64 machines. Without that support, initial performance tests suggest that x86-64 wont have the compelling overall performance edge thats needed to overcome Intels market dominance—power that Intel is already rumored to be exercising in discussions with motherboard makers and others who are in a position to help or hinder AMDs momentum.
Even before the Opteron launch event, though, AMD had reason to feel that the early betting might be in its favor. Two weeks before the launch, Microsoft promised midyear betas of Windows XP and Windows Server 2003 for x86-64, and IBMs DB2 was already on its way to the Opteron platform.
Whats often overlooked is that AMDs and Intels strategies are more similar than different.
On the fundamentals, its safe to bet that computing requirements in every economic segment will expand the market for 64-bit processors like Opteron and Itanium. Both offer the ability to work with growing collections of data, beyond the 4 billion items that are the intrinsic limit of a 32-bit chip. Both have the intrinsic computing speed, and the multiway scalability, to perform the next generation of critical enterprise tasks: large-scale data mining at the high end of strategic planning, advanced engineering and biotechnical work in the heart of product development, and sophisticated encryption algorithms at the foundations of electronic business.
When these enterprise needs are combined with the commercial attractions of digital moviemaking and other entertainment opportunities, the scenario looks more like a demand pull than a technology push—a crucial distinction in this time of demand for clear returns on additional IT investment.
One must wonder, then: If these benefits are so apparent, why are 32-bit systems still purchased so widely? Sixty-four-bit computing is not a 21st-century innovation; enterprise hardware builders such as IBM, Sun and Hewlett-Packard already offer respected families of 64-bit systems that are earning their keep in many applications. Current 64-bit systems, however, are too expensive for general adoption. The question that therefore tests the nerve of IT hardware makers is this: How many high-end processor architectures can the industry continue to develop and build?
Moores Law, the trend that doubles the number of devices on a chip every 18 months, is often cited as the force that transforms silicon into gold; chip builders also converse in much less cheerful terms about Moores Second Law, which characterizes the staggering growth in the cost of building each new generation of fabrication plants as that progress raises the stakes. Despite the unquestioned technical merits of designs like the late, lamented Alpha, only a handful of processor families can survive.
What AMD and Intel now need to see is the hole card of the enterprise IT buyer. When that card is revealed, will it show readiness to acquire and assimilate a whole new base of operating systems, enterprise middleware and applications to take advantage of the Itanium architectures completely new instruction set? Or will it reveal the combination of technical caution and commercial risk acceptance that could bring buyers to AMDs door, seeking a 64-bit superset of the well-established x86?
Oddsmakers should consider the growing importance of overseas markets, where desktop Athlon 64 machines (most likely running Linux) may well become the entry-level servers of choice—as 386-based machines did in the late 1980s.
Now, as then, the buyers will get to decide—just as they did the last time that the dealers in Moores Casino called out, “Double the bets!” Or was that “bits”?
Technology Editor Peter Coffee can be reached at [email protected].
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